SiC Epitaxial Layers Pillar Topography Defect Propagation
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Solution Overview
Problem
The challenge is to produce silicon carbide (SiC) wafers with low defects and grow high-quality SiC epitaxial layers with low defect density, while maintaining low costs and efficient epitaxial growth processes.
Innovation Solution
The method involves growing SiC epitaxy using a sublimation growth process for SiC boules, followed by off-axis cutting of SiC wafers. The epitaxial growth process includes step flow growth and merged epitaxial lateral overgrowth (MELO) techniques on a patterned SiC substrate with pillars and a mask layer, reducing defect propagation and enhancing epitaxial layer quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional SiC substrate fabrication processes are used (vapor phase ingot growth, cropping, wire sawing, grinding, polishing), then substrate quality can be maintained, but manufacturing cost remains high and defect density cannot be sufficiently reduced
Solution Approach 1:
The patent segments the substrate fabrication process by replacing the conventional single-step vapor phase ingot growth with a two-stage process: first growing a seed crystal, then using sublimation growth to extend the crystal. This segmentation allows optimization of each stage independently, reducing overall cost while maintaining quality.
Solution Approach 2:
The patent changes the growth mechanism parameter from vapor phase deposition to sublimation growth. This parameter change enables more efficient crystal growth with fewer defects and lower manufacturing costs, as sublimation growth allows better control over crystal structure and reduces inclusion formation.
2Power
If larger die sizes are used for high current applications, then device performance improves, but defect impact is magnified leading to lower yield
Solution Approach 1:
The patent performs preliminary defect reduction actions during the epitaxial growth stage by using sublimation-grown SiC substrates with inherently lower defect densities. This preliminary action ensures that when larger die sizes are eventually fabricated, the defect impact is minimized, maintaining high yield despite increased die area.
3Adaptability or versatility
If GaN substrates are used for WBG semiconductors, then device fabrication is enabled, but substrate cost is very high and scaling is limited
Solution Approach 1:
The patent creates a SiC substrate copy that replicates the beneficial properties needed for WBG semiconductor fabrication. By growing high-quality SiC epitaxial layers on sublimation-grown SiC substrates, the patent provides a cost-effective alternative to expensive GaN substrates while maintaining the necessary fabrication capabilities.
4Manufacturing precision
If more complex substrate fabrication steps are implemented, then substrate quality can be improved, but process complexity and cost increase
Solution Approach 1:
The patent extracts and eliminates unnecessary fabrication steps from the conventional process. By using sublimation growth to directly produce high-quality crystals, the patent removes the need for multiple post-growth processing steps like extensive cropping, wire sawing, and polishing, thereby reducing process complexity while maintaining substrate quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in SiC epitaxial layers with significantly reduced defect density, improved surface morphology, and lower manufacturing costs, supporting the fabrication of high-performance semiconductor devices.
Implementation Method 1
growing SiC epitaxy by a sublimation growth process for SiC boules
Implementation Method 2
growing SiC epitaxial layers with high quality surface morphology and low defect density
Implementation Method 3
growing SiC epitaxy by a sublimation growth process
Data Source
AI summary
A process for creating low defectivity epitaxial layers on a SiC substrate. A plurality of pillars are formed in the SiC substrate. A first SiC epitaxial layer is formed using epitaxial lateral overgrowth. The first SiC epitaxial layer comprises the pillars formed in the SiC substrate and the epitaxial lateral overgrowth. A second SiC epitaxial layer is formed overlying the first epitaxial layer. The second SiC epitaxial layer is formed using epitaxial vertical overgrowth. The SiC substrate, the first SiC epitaxial layer, and the second SiC epitaxial layer are single crystal. Defect propagation in growing the second SiC epitaxial layer is minimized by decreasing a top surface area of the plurality of pillars in relation to a surface area of the epitaxial lateral overgrowth.


