SiC Device Protection Trench Design for Avalanche Resistance

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Solution Overview

Problem

Silicon carbide semiconductor devices face issues with local electrical field concentration during reverse biasing, leading to decreased avalanche resistance due to insufficient protection trench design, which can cause breakdown in the gate oxide film.

Innovation Solution

The design incorporates cell-region linear trench sections with a greater horizontal distance than the protection trench sections, distributing the electrical field over a larger area to prevent local concentration and enhance avalanche resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the gate trench is insufficient to prevent electrical field concentration during reverse biasing, then the device structure is simpler, but the gate oxide film breaks due to excessive electrical field concentration

Engineering Contradiction:
Improvegate trench structureVSAvoidgate oxide film breakdown resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The protection trench is designed and positioned in advance around the gate trench to preemptively prevent electrical field concentration before it can reach the gate oxide film. This preliminary protective structure ensures that even during reverse biasing, the electrical field is redistributed before causing damage, thereby protecting the gate oxide film without requiring complex modifications to the gate trench itself.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3203528B1Silicon carbide semiconductor device, method for manufacturing silicon carbide semiconductor device, and method for designing silicon carbide semiconductor device
Publication Date: 2022.03.23 SHINDENGEN ELECTRIC MANUFACTURING CO LTD
  • EP3203528B1 patent drawingFigure 1
  • EP3203528B1 patent drawingFigure 2
  • EP3203528B1 patent drawingFigure 3

AI summary

A silicon carbide semiconductor device includes a silicon carbide layer 32 of a first conductivity type, a silicon carbide layer 36 of a second conductivity type, a gate trench 20, a gate electrode 79 provided in the gate trench 20, and a protection trench 10 formed to a depth greater than the gate trench 20. A region in the horizontal direction that includes both the gate trench 20 and a protection trench 10 that surrounds the gate trench 20 with at least a part of the gate trench 20 left unenclosed is a cell region, and a region in the horizontal direction that includes a protection trench 10 and in which a gate pad 89 or a lead electrode connected to the gate pad is disposed is a gate region. The protection trench 10 included in the cell region has a plurality of cell-region linear trench sections 11 that extend straight in the horizontal direction. The horizontal distance "D1" between the cell-region linear trench sections 11 is greater than the maximum horizontal distance "D3" between sections of the protection trench 10 included in the gate region.