SiC Power Semiconductor Rectifying Contact for Freewheel Conduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional silicon carbide power devices require an external freewheel diode due to high conduction voltage drops of parasitic body diodes, leading to less integration, higher cost, and lower efficiency.
Innovation Solution
A power semiconductor device is designed with a substrate of a first conductivity type, a drift region, a base region, a gate structure, and a contact metal forming a contact barrier with rectification characteristics, which replaces the parasitic body diode to complete the freewheel function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon carbide substrate is used to achieve high breakdown voltage and high-temperature operation, then device reliability and operating temperature range are improved, but substrate cost and manufacturing complexity increase
Solution Approach 1:
The invention divides the silicon carbide substrate into multiple smaller substrates arranged in an array, with each substrate containing a single power semiconductor device. This segmentation allows parallel processing and simplifies manufacturing while maintaining the high reliability benefits of silicon carbide by preserving the material properties in each individual device.
Solution Approach 2:
The invention introduces a carrier substrate as an intermediary that temporarily holds multiple silicon carbide substrates during the formation of connection portions. This carrier substrate facilitates the complex inter-substrate wiring process without requiring direct manipulation of the fragile silicon carbide substrates, thereby reducing manufacturing complexity.
2Adaptability or versatility
If connection portions are formed between substrates to enable signal transmission, then device functionality and integration are improved, but manufacturing steps and process complexity increase
Solution Approach 1:
The invention merges multiple silicon carbide substrates into a single integrated device by forming connection portions between them. The substrates are electrically connected through conductive layers and insulating layers that are formed simultaneously across multiple substrates, enabling complex device functionality while reducing the total number of separate manufacturing steps compared to individual device fabrication.
Solution Approach 2:
The invention performs preliminary actions by forming connection portions between substrates before final device assembly and testing. The conductive and insulating layers are prepared in advance on the carrier substrate, allowing subsequent assembly steps to be simplified and reducing overall manufacturing complexity.
3Productivity
If multiple substrates are arranged in an array to increase device capacity, then output power and processing capability are improved, but device area and fabrication complexity increase
Solution Approach 1:
The invention implements a nested structure where multiple silicon carbide substrates are arranged in an array on a carrier substrate. Each substrate contains a complete power semiconductor device, and the entire array is processed as a single unit. This nesting approach increases device capacity while minimizing the overall device area by utilizing vertical integration and shared infrastructure.
Solution Approach 2:
The carrier substrate serves multiple functions: it holds the array of silicon carbide substrates, provides a platform for forming connection portions, and facilitates simultaneous processing of all substrates. This multi-functionality increases device capacity without proportionally increasing the area required for fabrication infrastructure.
4Reliability
If insulating layers and conductive layers are formed between substrates to enable electrical connection, then device performance and signal transmission are improved, but manufacturing precision requirements and process difficulty increase
Solution Approach 1:
The invention controls the thickness and material composition of insulating and conductive layers as key parameters to achieve reliable electrical connections between substrates. By optimizing these layer parameters (thickness, conductivity, insulation properties), the invention ensures proper signal transmission while reducing the precision requirements for layer formation through standard semiconductor fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the freewheel conduction voltage drop, enhances reverse recovery speed, lowers reverse recovery peak current, and improves reliability compared to conventional devices.
Implementation Method 1
a contact metal disposed on the first-conductivity-type doping region and forming a contact barrier having rectification characteristics with the first-conductivity-type doping region below
Implementation Method 2
doping second-conductivity-type ions to form a base region of a second conductivity type in the drift region; doping first-conductivity-type ions to form a first-conductivity-type doping region
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A power semiconductor device and a manufacturing method therefor. The device comprises: a substrate (1); drain metal (10); a drift region (2); a base region (3); a gate structure; a first conductive type doped region (13) contacting the base region (3) on the side of the base region (3) distant from the gate structure; a source region (4) provided in the base region (3) and between the first conductive type doped region (13) and the gate structure; contact metal (11) that is provided on the first conductive type doped region (13) and forms a contact barrier having rectifying characteristics together with the first conductive type doped region (13) below; and source metal (6) wrapping the contact metal (11) and contacting the source region (4).