SiC Trench MOSFET SBD Doping Layout for Leakage and Short-Circuit Tradeoffs
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Solution Overview
Problem
Conventional silicon carbide semiconductor devices with built-in Schottky barrier diodes (SBDs) suffer from reduced short-circuit withstand capability due to etching damage during trench formation, leading to Fermi level pinning and varying Schottky barrier heights, which affects on-resistance and leakage current.
Innovation Solution
A silicon carbide semiconductor device structure is designed with a trench-gate-type MOSFET, incorporating SBDs with a lower n-type impurity concentration in the SBD portions to reduce leakage current and enhance short-circuit withstand capability, while maintaining low on-resistance, by optimizing the impurity concentration and width of the SBD portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a Schottky barrier diode is incorporated into the semiconductor substrate to suppress operation of a parasitic pn diode, then on-resistance is reduced, but short-circuit withstand capability is reduced due to etching damage during trench formation
Solution Approach 1:
The patent applies local quality by creating distinct impurity concentration zones within the n-type drift region. The SBD portion has a first impurity concentration while the adjacent upper JFET portion has a second impurity concentration that is different (typically higher). This local differentiation allows the SBD to provide low on-resistance while the higher doped JFET portion compensates for etching damage and maintains short-circuit withstand capability.
Solution Approach 2:
The patent changes the impurity concentration parameter spatially within the semiconductor device. By varying the impurity concentration from the SBD portion to the upper JFET portion, the device optimizes both electrical performance and reliability. The SBD region maintains lower doping for low resistance, while the JFET region has higher doping to withstand short-circuit conditions despite etching damage.
2Reliability
If the impurity concentration of the SBD portion is reduced to lower leakage current, then short-circuit withstand capability is enhanced, but on-resistance increases
Solution Approach 1:
The patent resolves this contradiction by applying local quality with differentiated impurity concentrations. The SBD portion maintains lower impurity concentration for low leakage current and low on-resistance, while the adjacent upper JFET portion has higher impurity concentration to provide short-circuit withstand capability. This localized optimization allows each region to fulfill its specific function without compromise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively reduces leakage current and enhances short-circuit withstand capability, suppressing the operation of parasitic pn diodes and maintaining low on-resistance, thereby improving the reliability and performance of the silicon carbide semiconductor device.
Implementation Method 1
A Schottky electrode formed at an inner wall of the second trench, the Schottky electrode being in contact with the fourth semiconductor region... A junction between a surface of the Schottky electrode and a surface of the SBD portion forms an SBD
Data Source
AI summary
A semiconductor device, including: first to fourth semiconductor regions, the fourth semiconductor region containing a first-conductivity-type impurity having a higher concentration than the first semiconductor region; first and second trenches; a gate electrode provided in the first trench; a Schottky electrode formed at an inner wall of the second trench, and in contact with the fourth semiconductor region; and a first electrode embedded in the second trench and in contact with the Schottky electrode. The fourth semiconductor region includes: an SBD portion formed at a sidewall of the second trench and in contact with the Schottky electrode, and an upper JFET portion provided between a sidewall of the first trench and the SBD portion. A junction between surfaces of the Schottky electrode and the SBD portion forms an SBD. A carrier concentration of the SBD portion is lower than the concentration of the first-conductivity-type impurity in the upper JFET portion.