SiC Schottky Barrier Diode Junction Stabilization
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Solution Overview
Problem
The production of silicon carbide Schottky barrier diodes (SiC-SBDs) faces challenges in stabilizing forward characteristics, particularly the barrier height and reducing variation in reverse leak current, due to instability in the Schottky junction and electric field concentration at the junction edge, which affects high-voltage applications and mass production.
Innovation Solution
A manufacturing method involving step control epitaxy, off-angle substrate use, formation of termination structures, dry thermal oxidation for silicon oxide films, and controlled heat treatments to stabilize the Schottky junction and reduce electric field concentration, including specific temperature and annealing processes to achieve consistent barrier heights and reduced reverse leak currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type termination structure is formed to alleviate electric field concentration at the junction edge, then the withstand voltage is improved, but the manufacturing complexity and process difficulty increase due to additional ion implantation and high-temperature heat treatment steps
Solution Approach 1:
The patent applies preliminary action by forming the p-type termination structure through ion implantation before the final Schottky junction formation. The termination structure is prepared in advance with controlled impurity concentration and depth, allowing the subsequent Schottky metal deposition to proceed without additional complex processing steps. This sequencing resolves the contradiction by embedding the voltage enhancement function into the foundational structure rather than adding separate corrective steps.
Solution Approach 2:
The patent implements local quality by creating a spatially varying impurity concentration profile where the p-type termination region has higher impurity concentration at the junction edge compared to the bulk epitaxial layer. This localized modification of electrical properties at the critical edge region alleviates electric field concentration without requiring uniform modification of the entire device structure, thereby achieving high withstand voltage with controlled process complexity.
2Reliability
If high-temperature heat treatment is performed to activate p-type impurity ions, then the termination structure functionality is improved, but the altered layer thickness increases requiring additional removal processes
Solution Approach 1:
The patent applies parameter changes by optimizing the heat treatment temperature and time parameters to achieve sufficient impurity activation while limiting altered layer growth. The activation annealing is performed at controlled temperatures (typically 1500-1700°C for SiC) for specific time durations that balance impurity activation efficiency with minimal surface degradation. This parameter optimization resolves the contradiction by finding the sweet spot where termination structure functionality is achieved without excessive altered layer formation.
Solution Approach 2:
The patent converts the harmful effect of altered layer formation during heat treatment into a beneficial process by utilizing the controlled oxidation that occurs simultaneously. The altered layer serves as a sacrificial oxide that can be uniformly removed by chemical etching, and this removal process also cleans the surface and prepares it for subsequent Schottky metal deposition. Thus, the heat treatment-induced alteration is transformed into a surface preparation step rather than a defect requiring separate correction.
3Manufacturing precision
If multiple process steps including oxidation and etching are used to remove altered layers, then the surface quality is improved, but the production time and manufacturing cost increase
Solution Approach 1:
The patent merges multiple surface treatment functions into a single integrated process step. The chemical etching step that removes the altered layer is combined with the surface cleaning and preparation for Schottky metal deposition. By using a selective etchant that specifically removes the oxidized altered layer while preserving the underlying epitaxial layer quality, the patent achieves surface preparation, defect removal, and deposition readiness in one operation, thereby improving production efficiency without sacrificing surface quality.
Solution Approach 2:
The patent applies the skipping principle by using a rapid chemical etching process that quickly removes the altered layer without requiring prolonged treatment times. The selective chemical etchant reacts rapidly with the oxidized altered layer material, allowing fast removal compared to mechanical polishing or gradual chemical processes. This rapid removal minimizes the time added to the manufacturing process while still achieving the necessary surface quality for high-performance Schottky junctions.
4Reliability
If Schottky metal is formed and sintering treatment is performed to stabilize barrier height, then the forward characteristics are improved, but the risk of metal diffusion and contamination increases
Solution Approach 1:
The patent introduces an intermediary protective layer between the Schottky metal and the SiC substrate that prevents direct contact and potential diffusion during sintering. This intermediary layer acts as a diffusion barrier and contamination shield, allowing the Schottky metal to be sintered at elevated temperatures to stabilize the barrier height without risking metal contamination of the semiconductor layer. The intermediary layer is designed to be thermally stable and chemically inert under sintering conditions, thus resolving the contradiction between achieving stable forward characteristics and preventing harmful metal diffusion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively stabilizes the forward characteristics and reduces variation in reverse leak current, achieving consistent barrier heights and improved reliability for high-voltage SiC-SBDs, suitable for mass production and commercialization.
Implementation Method 1
a step of forming a silicon oxide film on the epitaxial layer by dry thermal oxidation
Implementation Method 2
a step of forming an ohmic junction between the first metal film and the other main surface of the silicon carbide substrate by performing a heat treatment on the silicon carbide substrate at a first temperature
Implementation Method 3
a step of forming a Schottky junction between the second metal film and the epitaxial layer by performing a heat treatment on the silicon carbide substrate at a second temperature
Data Source
AI summary
A silicon oxide film is formed on an epitaxial layer by dry thermal oxidation, an ohmic electrode is formed on a back surface of a SiC substrate, an ohmic junction is formed between the ohmic electrode and the back surface of the SiC substrate by annealing the SiC substrate, the silicon oxide film is removed, and a Schottky electrode is formed on the epitaxial layer. Then, a sintering treatment is performed to form a Schottky junction between the Schottky electrode and the epitaxial layer.