Self-Assembled Patterns on Silicon Carbide Substrates

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Solution Overview

Problem

The existing semiconductor manufacturing processes are complex and costly due to the need for additional steps like patterning and regrowth to reduce dislocation defects in semiconductor layers, which also deteriorate the substrate surface quality.

Innovation Solution

A semiconductor device and method that utilize self-assembled patterns or grooves on silicon carbide substrates to form epitaxial layers directly, eliminating the need for buffer layers and associated processes, thereby reducing process costs and improving substrate quality by minimizing dislocation defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a buffer layer is formed to reduce dislocation defects, then the crystalline quality is improved, but the manufacturing process becomes complicated and costs increase

Engineering Contradiction:
Improvecrystalline qualityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The substrate surface automatically forms self-assembled patterns (nano-dots or grooves) through controlled etching processes, eliminating the need for external patterning steps. The substrate serves itself to create the necessary structures for dislocation management, reducing process complexity while maintaining crystalline quality improvement

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention changes the etching parameters (gas composition, temperature, time) to directly form self-assembled patterns on the substrate surface. By adjusting these parameters, the substrate surface transforms into a configuration that naturally reduces dislocation defects without requiring additional buffer layer formation processes

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If additional patterning and etching processes are used to form buffer layers, then dislocation defects are reduced, but manufacturing costs increase

Engineering Contradiction:
Improvedislocation defect reductionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The substrate surface automatically forms self-assembled patterns (nano-dots or grooves) through controlled etching processes, eliminating the need for external patterning steps. The substrate serves itself to create the necessary structures for dislocation management, reducing process complexity while maintaining crystalline quality improvement

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention changes the etching parameters (gas composition, temperature, time) to directly form self-assembled patterns on the substrate surface. By adjusting these parameters, the substrate surface transforms into a configuration that naturally reduces dislocation defects without requiring additional buffer layer formation processes

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If buffer layers are formed through additional processes, then dislocation defects are reduced, but substrate surface quality deteriorates

Engineering Contradiction:
Improvedislocation defect reductionVSAvoidsubstrate surface quality
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The self-assembled patterns (nano-dots or grooves) are formed on the substrate surface before epitaxial growth begins. This preliminary structuring creates a template that guides dislocation propagation away from the growth region, preventing damage to the substrate surface during subsequent buffer layer formation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the etching parameters (gas composition, temperature, time) to directly form self-assembled patterns on the substrate surface. By adjusting these parameters, the substrate surface transforms into a configuration that naturally reduces dislocation defects without requiring additional buffer layer formation processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces process costs and enhances substrate quality by directly forming high-quality epitaxial layers with minimized dislocation defects, specifically reducing basal plane dislocations by up to 50% without the need for additional buffer layers, thus improving the reliability and efficiency of semiconductor devices.

Implementation Method 1

the pattern is a self-assembled pattern

Methodology Applied
Scientific EffectSelf-assembly: Self-Assembly

Implementation Method 2

forming an epitaxial layer on the buffer layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentEP2668662B1Semiconductor device and method for growing semiconductor crystal
Publication Date: 2019.07.03 LG INNOTEK CO LTD
  • EP2668662B1 patent drawingFigure 1~6
  • EP2668662B1 patent drawingFigure 7~9
  • EP2668662B1 patent drawingFigure 10~14

AI summary

A semiconductor device comprises a base substrate, a pattern on the base substrate, a buffer layer on the base substrate, and an epitaxial layer on the buffer. The pattern is a self-assembled pattern. A method for growing a semiconductor crystal comprises cleaning a silicon carbide substrate, forming a self-assembled pattern on the silicon carbide substrate, forming a buffer layer on the silicon carbide substrate, and forming an epitaxial layer on the buffer layer. A semiconductor device comprises a base substrate comprising a pattern groove and an epitaxial layer on the base substrate. A method for growing a semiconductor crystal comprises cleaning a silicon carbide substrate, forming a self-assembled projection on the silicon carbide substrate, forming a pattern groove in the silicon carbide, and forming an epitaxial layer on the silicon carbide.