SiC Semiconductor Device Bonding with Copper Plate
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Solution Overview
Problem
Semiconductor devices using silicon carbide (SiC) face thermal stress and cracking due to the large linear expansion coefficient difference between the bonding layer and the SiC material, particularly under high power and temperature conditions, leading to reliability issues.
Innovation Solution
A semiconductor device design featuring a silicon carbide chip bonded to a base plate with metal layers and an insulating body, where the bonding material has a post-bonding melting point greater than 773°C and a thickness less than 50 micrometers, and the base plate thickness is greater than 500 micrometers, with a specific thickness ratio of insulating body to metal layers optimizing the linear expansion coefficient to reduce thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick solder bonding layer is used to reduce thermal stress, then bonding reliability improves, but heat dissipation performance deteriorates
Solution Approach 1:
The patent changes the material parameters of the bonding layer by using a copper plate with specific thickness (greater than 100 micrometers) and controlled linear expansion coefficient, replacing the conventional thick solder bonding layer. This parameter change allows achieving both reduced thermal stress and maintained heat dissipation performance.
Solution Approach 2:
The patent employs a composite structure consisting of a copper plate bonding layer combined with an insulating substrate. This composite material approach allows the copper plate to provide thermal conductivity and stress relief, while the insulating substrate provides electrical isolation and mechanical support, resolving the contradiction between bonding reliability and heat dissipation.
2Loss of energy
If a bonding layer with high thermal conductivity is used, then heat dissipation improves, but thermal stress increases due to linear expansion coefficient mismatch
Solution Approach 1:
The patent carefully selects and controls the linear expansion coefficient parameter of the copper plate bonding layer to match that of the SiC semiconductor chip. By adjusting this parameter, the patent achieves both high thermal conductivity for heat dissipation and minimal thermal stress from expansion mismatch.
Solution Approach 2:
The patent applies different material properties to different parts of the bonding structure: the copper plate provides high thermal conductivity and matched linear expansion coefficient for stress reduction, while the insulating substrate provides electrical isolation. This local quality differentiation resolves the contradiction between heat dissipation and thermal stress.
3Loss of energy
If the bonding layer thickness is reduced to improve heat dissipation, then heat dissipation performance improves, but bonding strength deteriorates
Solution Approach 1:
The patent uses a composite structure where a thin copper plate bonding layer is combined with a thick insulating substrate. The copper plate provides strong bonding and heat dissipation, while the insulating substrate provides mechanical support and stress distribution, enabling reduced bonding layer thickness without sacrificing bonding strength.
Solution Approach 2:
The patent optimizes the thickness parameter of the copper plate bonding layer to greater than 100 micrometers, which is thinner than conventional solder layers but provides sufficient bonding strength due to copper's superior mechanical properties and bonding characteristics, while simultaneously improving heat dissipation performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the bonding strength and reliability of SiC-based semiconductor devices by confining deformation within the elastic range, preventing cracking and peeling, while maintaining satisfactory heat dissipation.
Implementation Method 1
strain and thermal stress occurring in the solder bonding layer due to a difference in the linear expansion coefficient between the semiconductor chip and the copper plate
Implementation Method 2
maintaining satisfactory heat dissipation
Data Source
AI summary
A semiconductor device includes a semiconductor chip made of material containing silicon carbide, a base plate including a plate-shaped insulating body and metal layers disposed on opposite faces thereof, and a bonding material bonding the semiconductor chip on one face of the base plate, wherein the bonding material is made of a metal material whose post-bonding melting point is greater than or equal to 773° C., wherein a thickness of the bonding material is less than or equal to 50 micrometers, wherein a thickness of the base plate is greater than or equal to 500 micrometers, and wherein with a thickness of the insulating body being denoted as tI, and a thickness of each of the metal layers being denoted as tM, a value of tI/tM is greater than or equal to 4.3.