SiC Semiconductor Device Segmented Well Regions for Stress Testing
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Solution Overview
Problem
The existing semiconductor devices face challenges in conducting stress tests efficiently due to the formation of triangular stacking faults, which degrade transistor characteristics and increase manufacturing costs, particularly in wide bandgap semiconductors like silicon carbide, leading to prolonged test times and variations in chip reliability.
Innovation Solution
A semiconductor device structure incorporating a wide bandgap semiconductor substrate with a drift layer, well regions, and a separate test electrode that allows for a higher stress current to be applied without overheating the active region, thereby reducing the formation of stacking faults and shortening the stress test duration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a forward current is applied to a p-n diode structure for stress testing, then the reliability can be evaluated, but the triangular stacking faults extend into crystals from basal plane dislocations, degrading the transistor characteristics
Solution Approach 1:
The patent segments the well regions into two types: first well regions that form parasitic diodes with the drift layer for stress testing, and second well regions that are electrically isolated to serve as transistor active regions. This segmentation allows stress current to be applied selectively to the first well regions without affecting the transistor characteristics of the second well regions, thus resolving the contradiction between reliability evaluation and manufacturing precision.
2Productivity
If a high stress current is applied to complete the test in a short period, then the productivity improves, but the excess current damages the chip or test equipment through excess heat generation
Solution Approach 1:
By segmenting the well regions into stress test regions and active regions, the patent enables high current to be applied only to the stress test regions without overheating the active regions. This allows rapid stress testing to be performed on multiple devices simultaneously at high current levels, improving productivity while avoiding thermal damage to the chip or test equipment.
3Device complexity
If the body diode in the MOSFET serves as the free-wheeling diode, then the device complexity is reduced, but the forward current through the body diode degrades the reliability
Solution Approach 1:
The patent segments the well regions so that first well regions form parasitic diodes suitable for stress testing and reliability evaluation, while second well regions serve as transistor active regions. This segmentation enables the body diode to function as a free-wheeling diode without degrading reliability, as the stress test current can be applied selectively to the first well regions without affecting the active regions that perform the free-wheeling function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a shorter stress test time while minimizing heat generation and variations in transistor characteristics, enhancing chip reliability and manufacturing efficiency.
Implementation Method 1
a drift layer (20) formed on the substrate (10), and made of a wide bandgap semiconductor
Implementation Method 2
an excess current to finish the test for a short period of time may damage a chip or test equipment through excess generation of heat in a diode element
Implementation Method 3
A p-n junction between the second well region and the drift layer is forward biased with application of a voltage between the second electrode and the third electrode
Implementation Method 4
recombined energy obtained when minority carriers injected through the p-n diode are recombined with majority carriers causes the triangular stacking faults (may also be referred to as 'Shockley-type stacking faults'), which are plane defects, to extend into crystals
Data Source
AI summary
A drift layer is made of a wide bandgap semiconductor. First well regions are formed on the drift layer. A source region is formed on each of the first well regions. A gate insulating film is formed on the first well regions. A first electrode is in contact with the source regions, and has diode characteristics allowing unipolar conduction to the drift layer between the first well regions. A second well region is formed on the drift layer. A second electrode is in contact with the second well region, and separated from a gate electrode and the first electrode.