SiC Semiconductor Device Stabilizing High Temperature Operation

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Solution Overview

Problem

Semiconductor devices experience instability due to inappropriate temperature coefficients within the temperature range of use, leading to potential thermal runaway and unstable operations.

Innovation Solution

The semiconductor device incorporates a specific structure with silicon carbide regions of different conductivity types and impurity concentrations, including a fourth semiconductor region with a higher concentration of a second conductivity type impurity, which helps in suppressing hole current and maintaining a positive temperature coefficient, thereby stabilizing operations at high temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a conventional semiconductor device structure is used, then the device can operate at high temperatures, but the temperature coefficient becomes inappropriate leading to unstable operation

Engineering Contradiction:
Improveoperating temperatureVSAvoidoperational stability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent introduces a fourth semiconductor region with specifically engineered impurity concentration (higher than the second semiconductor region but not more than 1/2 of the third semiconductor region) to create localized electrical characteristics that suppress hole current. This local modification of impurity distribution in the fourth region provides the necessary positive temperature coefficient without affecting the overall high-temperature operation capability of the device.

Inventive Principle:
Principle #3Local quality

2Object-affected harmful factors

If the impurity concentration in the fourth semiconductor region is increased to suppress hole current, then thermal runaway is suppressed, but the device complexity increases

Engineering Contradiction:
Improvethermal runaway suppressionVSAvoidsemiconductor region structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent employs parameter changes by precisely controlling the impurity concentration in the fourth semiconductor region within a specific range (higher than the second region but not more than 1/2 of the third region). This quantitative parameter optimization achieves thermal runaway suppression through appropriate hole current suppression while avoiding excessive structural complexity, as the fourth region simply extends the existing multi-layer semiconductor structure with a defined impurity gradient.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10629687B2Silicon carbide semiconductor device
Publication Date: 2020.04.21 KK TOSHIBA
  • US10629687B2 patent drawing
  • US10629687B2 patent drawing
  • US10629687B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes a first element. The first element includes a first electrode, a second electrode and first to fourth semiconductor regions. The second electrode includes a first conductive region and a second conductive region. The first semiconductor region is provided between the first electrode and the first conductive region and between the first electrode and the second conductive region. The second semiconductor region includes a first partial region and a second partial region. The first partial region is provided between the first electrode and the first conductive region. The second partial region is provided between the first electrode and the second conductive region. The third semiconductor region is provided between the second partial region and the second conductive region. The fourth semiconductor region is provided between the third semiconductor region and the second conductive region.