SiC Semiconductor Device with Third Region for Temperature Stability
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Solution Overview
Problem
Silicon carbide (SiC)-based semiconductor devices exhibit negative temperature characteristics, leading to excessive current flow when subjected to large currents, necessitating stable characteristics against temperature changes.
Innovation Solution
A semiconductor device configuration with a third semiconductor region of p-type SiC, ion-implanted between the n-type and p-type SiC regions, which increases resistance and shifts temperature characteristics to positive, thereby controlling on-resistance and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SiC-based semiconductor device is used to achieve lower on-resistance and higher breakdown voltage, then device performance is improved, but negative temperature characteristic causes excessive current flow at high temperatures
Solution Approach 1:
The patent introduces a third semiconductor region with different conductivity type between the first and second semiconductor regions, creating local variation in electrical properties. This third region is selectively positioned to modulate the temperature characteristics in specific areas, allowing the device to maintain stable overall performance while compensating for the negative temperature coefficient of SiC material.
Solution Approach 2:
The patent changes the conductivity type parameter by introducing a third semiconductor region with opposite conductivity type between the first and second regions. This parameter change creates a compensating effect that shifts the temperature characteristics from negative to positive, stabilizing the on-resistance against temperature variations while maintaining the low on-resistance and high breakdown voltage performance of SiC.
2Stability of the object's composition
If third semiconductor region is added to control temperature characteristics, then temperature stability is improved, but device structure becomes more complex
Solution Approach 1:
The patent segments the semiconductor device into three distinct regions with different conductivity types, where the third region is strategically positioned between the first and second regions. This segmentation allows independent optimization of each region's properties to achieve overall temperature stability while maintaining a relatively simple layered structure that can be integrated into existing SiC device architectures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves stable temperature characteristics and increased on-resistance at high temperatures, balancing temperature stability and resistance, enhancing performance under varying conditions.
Implementation Method 1
A semiconductor device configuration with a third semiconductor region of p-type SiC, ion-implanted between the n-type and p-type SiC regions, which increases resistance and shifts temperature characteristics to positive
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The first semiconductor region includes silicon carbide. A conductivity type of the first semiconductor region is a first conductivity type. The second semiconductor region includes silicon carbide. A conductivity type of the second semiconductor region is a second conductivity type. The third semiconductor region includes silicon carbide. A conductivity type of the third semiconductor is the second conductivity type. The third semiconductor region is provided between the first semiconductor region and the second semiconductor region. As viewed in a direction connecting the first semiconductor region and the second semiconductor region, an area of an overlapping region of the second semiconductor region and the third semiconductor region is smaller than an area of an overlapping region of the first semiconductor region and the second semiconductor region.