Self-Aligned Ion Implanted Gate and Guard Ring Structure for SiC SIT
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Solution Overview
Problem
Existing semiconductor technologies, such as Schottky gate and ion implanted gate static induction transistors, face challenges including inconsistent gate fabrication, reliability issues, and manufacturing difficulties due to precise mask alignment requirements, particularly when producing multiple transistors on a single wafer.
Innovation Solution
A self-aligned ion implanted gate and guard rings structure is developed, utilizing epitaxially grown silicon carbide layers with a metallic mask and oxidation process to form parallel pillars and oxide skirts, allowing for ion implantation without mask alignment, thereby enhancing gate-to-source breakdown voltage and reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If ion implanted gate SIT is manufactured using traditional mask alignment methods, then gate regions can be formed, but manufacturing precision deteriorates due to imprecise spacing and alignment requirements when hundreds of SITs are fabricated simultaneously
Solution Approach 1:
The patent applies preliminary action by forming oxide skirts around the channel region before ion implantation. These pre-formed oxide structures serve as natural alignment references, eliminating the need for complex mask alignment during subsequent ion implantation steps. The oxide skirts are created through selective oxidation of exposed semiconductor surfaces, establishing precise spatial relationships in advance.
Solution Approach 2:
The invention employs self-service through self-aligned ion implantation where the oxide skirt structures automatically define the implantation regions. The ion implantation process uses the oxide skirts as built-in masks, with ions implanting through openings in the oxide to form gate regions precisely where needed. This self-aligning mechanism eliminates manual mask alignment requirements entirely.
2Ease of manufacture
If Schottky gate SIT is used, then fabrication process is simplified, but reliability deteriorates due to inconsistent gate fabrication
Solution Approach 1:
The patent replaces mechanical mask alignment systems with a chemically-driven self-alignment process. Instead of relying on physical mask placement and alignment, the invention uses selective oxidation chemistry to automatically form oxide skirts at precise locations. This chemical self-organization replaces the mechanical alignment system, providing both simplicity and precision.
Solution Approach 2:
The invention changes the fundamental parameter of gate formation from mechanical deposition to chemical oxidation followed by controlled ion implantation. The oxide skirt formation through thermal oxidation and the subsequent ion implantation through controlled openings create highly consistent gate structures. This parameter change from mechanical to chemical/physical processes improves fabrication consistency while maintaining ease of manufacture.
3Manufacturing precision
If multiple masks are used for ion implantation, then gate regions can be formed with proper spacing, but manufacturing precision deteriorates due to cumulative alignment errors across multiple masks
Solution Approach 1:
The patent extracts and eliminates the mask component from the ion implantation process entirely. Instead of using multiple masks that require alignment, the invention uses the oxide skirt structures themselves as the defining elements for ion implantation regions. This extraction of the mask element simplifies the process while maintaining or improving precision.
Solution Approach 2:
The invention merges the functions of multiple masks into a single self-formed oxide skirt structure. The oxide skirts simultaneously define multiple implantation regions and provide self-alignment references, combining what would traditionally require multiple separate mask layers into one integrated structure. This merging eliminates cumulative alignment errors while reducing process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method eliminates mask alignment issues, improves gate-to-source breakdown voltage, and reduces leakage current, enabling reliable high-temperature, high-frequency operation suitable for harsh environments like radar and space applications.
Implementation Method 1
The oxide arrangement which is between the strips is etched down to the next adjacent semiconductor layer to form an array of parallel pillars each having at the base thereof, the remainder of the top layer after the etching step
Implementation Method 2
The resulting structure is subjected to an oxidation process to grow an oxide skirt around the base of the pillar and to consume the edges of the remainder of the top layer
Implementation Method 3
The resulting structure is then subjected to an ion implantation to form gate regions of a second conductivity type between the oxide skirts
Implementation Method 4
providing a semiconductor body with a plurality of epitaxially grown layers of a first conductivity type on a substrate
Data Source
AI summary
A method of making a semiconductor structure for use in a static induction transistor. Three layers of a SiC material are on a substrate with the top layer covered with a thick oxide. A mask having a plurality of strips is deposited on the top of the oxide to protect the area underneath it, and an etch removes the oxide, the third layer and a small amount of the second layer, leaving a plurality of pillars. An oxidation step grows an oxide skirt around the base of each pillar and consumes the edge portions of the third layer under the oxide to form a source. An ion implantation forms gate regions between the skirts. At the same time, a plurality of guard rings is formed. Removal of all oxide results in a semiconductor structure to which source, gate and drain connections may be made to form a static induction transistor. A greater separation between a source and gate is obtained by placing a spacer layer on the sidewalls of the pillars, either before or after formation of the skirt.


