SiC-SOI Device Trench Isolation Breakdown Voltage
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Solution Overview
Problem
The existing Si dielectric isolated substrate structures face challenges in increasing breakdown voltage without thickening the SOI layer, particularly when the wafer diameter exceeds 6 inches, due to warpage issues and limitations in advanced integration caused by the widening of V-shaped separation regions.
Innovation Solution
The SiC-SOI device structure incorporates a SiC substrate bonded to a first substrate through an insulating film, featuring a device region with a drift region, trenches, and thin insulating films to reduce ON resistance and suppress avalanche current multiplication, allowing for increased breakdown voltage without thickening the SOI layer. This structure includes a drift region of a first conductivity type, diffusion regions, and thin insulating films spaced 0.4 μm or less, along with a surrounding region with a second trench and isolated insulating film to dielectrically isolate the device region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the SOI layer is thickened to increase breakdown voltage, then the breakdown voltage increases, but the V-shaped separation region must be widened which obstructs advanced integration
Solution Approach 1:
The patent introduces thin insulating films arranged in multiple layers at different depths within the drift region, transforming the traditional single-dimensional thickness increase into a multi-dimensional structure. This allows achieving high breakdown voltage through vertical stacking of insulating films rather than increasing the SOI layer thickness horizontally, thereby avoiding the need to widen the V-shaped separation region and maintaining integration capability.
Solution Approach 2:
The patent employs a composite structure combining the SOI layer with multiple thin insulating films made of different materials (such as silicon oxide, silicon nitride) embedded within the drift region. This composite approach enables the system to achieve high breakdown voltage through the combined effect of multiple thin layers rather than relying on a single thick SOI layer, thus avoiding the integration obstacles caused by widened separation regions.
2Reliability
If poly-Si substrate is used for EPIC structure, then device isolation is achieved, but large warpage occurs making wafer processing difficult for 6 inches or more diameter
Solution Approach 1:
The patent changes the substrate material from poly-Si to SiC, fundamentally altering the material parameters to eliminate warpage issues. SiC substrates provide superior thermal and mechanical stability, enabling large-diameter wafer processing (6 inches or more) while maintaining effective device isolation through the engineered thin insulating film structure within the drift region rather than relying on substrate-based isolation.
3Reliability
If thin insulating films are placed close to drift region surface, then field intensity is maximized to increase breakdown voltage, but avalanche current multiplication may occur
Solution Approach 1:
The patent divides the insulating structure into multiple thin films distributed at different positions within the drift region rather than using a single thick layer. This segmentation allows the electric field to be distributed and controlled across multiple interfaces, maximizing field intensity for high breakdown voltage while the spacing and arrangement of individual thin films prevent the continuous avalanche breakdown that would occur in a single concentrated high-field region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SiC-SOI device effectively suppresses avalanche current multiplication and reduces conduction loss, enabling increased breakdown voltage without thickening the SOI layer, thus addressing the limitations of existing technologies in larger wafer diameters and maintaining advanced integration capabilities.
Implementation Method 1
The SiC substrate is bonded to the first substrate through an insulating film
Implementation Method 2
Even upon occurrence of the avalanche current in a formation region of the first or second thin insulating films, an advantage of suppressing the avalanche current multiplication will be produced
Data Source
AI summary
The object of the present invention is to increase the breakdown voltage without thickening an SOI layer in a wafer-bonded dielectric isolated structure. A device region of a SiC-SOI device includes: a first trench continuously or intermittently surrounding an n− type drift region and not penetrating a SiC substrate; an n+ type side surface diffusion region formed on each side surface of the first trench; an n+ type bottom diffusion region formed under the n− type drift region and in contact with the n+ type side surface diffusion region; and a plurality of thin insulating films formed in proximity to a surface of the n− type drift region at regular spacings of 0.4 μm or less. A surrounding region includes a second trench formed to continuously surround the first trench and penetrating the SiC substrate, and an isolated insulating film region formed on each side surface of the second trench.