SiC Switch Source Contact Self-Alignment via Oxidation Rate Difference

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Solution Overview

Problem

Increasing the cell density in SiC planar gate power devices is difficult due to the required mask alignments for forming P-well, N+ sources, P+ body contacts, and planar polysilicon gates, which limits the cell density and increases on-resistance.

Innovation Solution

Utilizing the difference in oxidation rates between poly-silicon and SiC to form a self-aligned source metal contact, eliminating the need for mask alignments and allowing for a more precise spacing between the source metal and polysilicon gate, thereby increasing cell density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If mask alignment techniques are used to form source metal contact, then manufacturing process is well-established, but cell density is limited and on-resistance increases

Engineering Contradiction:
Improvemask alignment precisionVSAvoidcell density
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The oxidation process automatically forms oxide layers on polysilicon gates and SiC surfaces with different thicknesses based on their intrinsic oxidation rate differences. This self-service mechanism eliminates the need for external mask alignment to define source contact regions, as the oxide pattern forms automatically with precise spatial definition.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention exploits the parameter difference in oxidation rates between polysilicon and SiC materials. By controlling oxidation conditions, thicker oxide forms on polysilicon while thinner oxide forms on SiC, creating a self-aligned pattern that defines source contact regions without requiring mask alignment.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If mask alignment steps are performed to define source metal contact area, then process control is maintained, but spacing between source metal and gate is suboptimal

Engineering Contradiction:
Improveprocess controlVSAvoidsource metal to gate spacing
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention replaces the mechanical mask alignment system with a chemical oxidation-based self-alignment system. The oxide layer thickness is controlled by chemical reaction kinetics and material properties rather than mechanical positioning, achieving superior spacing precision.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If conventional fabrication processes are used, then manufacturing complexity is manageable, but cell density cannot be increased beyond certain point

Engineering Contradiction:
Improvefabrication process complexityVSAvoidcell density
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The invention merges the oxide formation step with the source contact definition step. The same oxidation process that insulates the gate also defines the source contact regions, eliminating separate mask alignment and patterning steps, thereby reducing overall process complexity while enabling higher cell density.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Achieves a higher cell density with reduced on-resistance by ensuring a repeatable and optimally minimal spacing between the source metal and gate, enhancing current conduction and reducing resistance.

Implementation Method 1

A blanket oxidation step is then conducted to grow an oxide layer over the polysilicon gates and along sides edges of the polysilicon gates. The oxidation rate of polysilicon is more than thirty times greater than the oxidation rate of SiC.

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20250241037A1Self-aligned source contact for sic switch utilizing oxidation rate difference between poly-si and sic
Publication Date: 2025.07.24 MAXPOWER SEMICONDUCTOR INC
  • US20250241037A1 patent drawing
  • US20250241037A1 patent drawing
  • US20250241037A1 patent drawing

AI summary

A SiC vertical power switch is formed with planar polysilicon gates. For forming the source metal contact opening over the N+ sources, the large difference in oxidation rates of the planar polysilicon gate and the SiC surface of the N+ source is utilized. A blanket (no mask) oxidation step forms a relatively thick oxide layer over the top of the polysilicon gates and along the side edges of the polysilicon gates, while the oxide formed over the exposed SiC source regions is much thinner. A short blanket etch (no mask) is then used to remove the very thin oxide layer over the source regions. The source metal is then deposited over the insulated gates and the exposed N+ source, where the source metal is self-aligned to the gate so as to have a very repeatable and optimally minimum spacing for a maximum cell density.