SiC Source/Drain Wave-Shaped Surface for NMOS Strain
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Solution Overview
Problem
Current semiconductor technologies face challenges in enhancing electron mobility in NMOS transistors through effective stress application in source/drain regions, particularly in incorporating sufficient carbon in silicon carbon (SiC) layers to achieve optimal strain.
Innovation Solution
The semiconductor device incorporates a silicon carbon (SiC) layer with a sufficient carbon concentration in the source/drain regions, featuring a wave-shaped upper surface and a capping source/drain region with epitaxially grown silicon, along with a silicide layer and contact patterns to improve strain and contact efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If carbon-containing ratio is increased in the silicon carbon (SiC) layer to apply greater stress to channel regions and source/drain regions, then electron mobility is improved, but manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent changes the carbon concentration parameter in the SiC layer from high to optimized ranges (0.5-5 atomic percent), demonstrating that extreme values are not necessary. By adjusting this parameter to a moderate range, the patent achieves sufficient stress for improved electron mobility while maintaining manufacturability and control precision.
Solution Approach 2:
The patent replaces the mechanical approach of simply increasing carbon content to achieve stress with a more controlled method involving specific SiC layer formation techniques and thickness control (5-50 nm). This substitution allows stress application without the manufacturing difficulties associated with high carbon concentrations.
2Area of stationary object
If a flat upper surface is used in the source/drain region, then manufacturing is simplified, but contact area with gate patterns is reduced
Solution Approach 1:
The patent applies curvature to the upper surface of the source/drain region, creating a convex or dome-shaped surface instead of a flat one. This curvature increases the surface area available for contact with gate patterns and other structures, improving electrical contact without significantly complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electron mobility, reduces sheet resistance, and improves the performance of NMOS transistors by effectively applying strain and increasing contact area resistance.
Implementation Method 1
The interfacial insulating layers may include silicon oxide formed by oxidizing the surface of the fin active region.
Implementation Method 2
The capping source/drain region may include epitaxially grown silicon (Si).
Data Source
AI summary
Provided is a semiconductor device. In some examples, the semiconductor device includes an fin active region protruding from a substrate, gate patterns disposed on the fin active region, a source/drain region disposed on the fin active region between the gate patterns, and contact patterns disposed on the source/drain region. The source/drain region may have a protruding middle section, which may form a wave-shaped upper surface of the source/drain region.