SiC Trench MOSFET Source Structure for Short-Circuit Tolerance
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Solution Overview
Problem
Silicon carbide (SiC) semiconductor devices face challenges in achieving high short-circuit tolerance and minimizing trench gate tilt due to variations in impurity concentration and film thickness, which affect channel mobility and element miniaturization.
Innovation Solution
The SiC semiconductor device incorporates a dual-source region structure, where the first source region is formed by epitaxial growth and the second source region by ion implantation, allowing for enhanced control of impurity concentration and reduced film thickness variations, thereby improving short-circuit tolerance and channel mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single source region is formed by conventional methods, then the manufacturing process is simple, but the impurity concentration control is poor and film thickness variations cause trench gate tilt
Solution Approach 1:
The source region is divided into two distinct parts: a first source region formed by epitaxial growth and a second source region formed by ion implantation. This segmentation allows each region to be optimized independently for different functions, with the first source region providing a foundation layer and the second source region providing precise impurity concentration control, thereby resolving the contradiction between manufacturing precision and device complexity.
Solution Approach 2:
Different regions of the source are given different properties through the dual-structure design. The first source region has impurities introduced during epitaxial growth, while the second source region has precisely controlled impurity concentration through ion implantation. This local differentiation of quality allows optimal performance in different areas, addressing the impurity concentration control issue without requiring complete redesign of the entire source region.
2Speed
If high impurity concentration is used in the source region, then channel mobility is improved, but short-circuit tolerance deteriorates
Solution Approach 1:
The dual source region structure applies local quality by having the first source region (formed by epitaxial growth) provide a base impurity level for channel mobility, while the second source region (formed by ion implantation) provides precisely controlled additional impurity concentration. This spatial differentiation of impurity concentration allows optimization of channel mobility in the first region while controlling short-circuit tolerance through the second region's controlled doping, resolving the contradiction between speed and reliability.
3Productivity
If trench gate structure is used to increase channel density, then current carrying capacity is improved, but manufacturing precision deteriorates due to film thickness variations
Solution Approach 1:
The source region is segmented into two parts with different formation methods: epitaxial growth for the first source region and ion implantation for the second source region. This segmentation enables independent optimization of each region's properties, allowing the trench gate structure to achieve high channel density while the dual-source configuration compensates for film thickness variations, thereby maintaining manufacturing precision despite the complexity of the trench gate structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the short-circuit withstand capability and channel mobility, enabling the miniaturization of SiC semiconductor devices while stabilizing impurity concentration control.
Implementation Method 1
the first source region is formed by epitaxial growth
Implementation Method 2
the second source region by ion implantation
Data Source
AI summary
A semiconductor device includes a semiconductor element having a substrate, a drift layer, a base region, a source region, trench gate structures, an interlayer insulating film, a source electrode, and a drain electrode. The substrate is made of silicon carbide. The drift layer is disposed on the substrate and has an impurity concentration lower than the substrate. The base region is made of silicon carbide and disposed on the drift layer. The source region is made of silicon carbide having an impurity concentration higher than the drift layer. Each trench gate structure has a gate trench, a gate insulating film, and a gate electrode. The interlayer insulating film covers the gate electrode and the gate insulating film. The source electrode is in ohmic-contact with the source region. The drain electrode is disposed on a rear surface of the substrate.


