SiC Source Trench Layout for Reliable Source Grounding

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Solution Overview

Problem

Existing SiC semiconductor devices struggle to appropriately source-ground the source region in a structure that includes a source trench.

Innovation Solution

The SiC semiconductor device includes an SiC semiconductor layer with a source trench, a source electrode embedded in the trench, and a body region connected to the source electrode, allowing for appropriate source-grounding of the source region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a source trench structure is used in SiC semiconductor devices, then device integration and miniaturization are improved, but appropriate source-grounding of the source region becomes difficult to achieve

Engineering Contradiction:
Improvedevice sizeVSAvoidsource-grounding performance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent transitions from planar source-grounding to three-dimensional source-grounding by having the source region extend vertically along the side wall of the source trench. The source region is formed in a manner that encompasses the side wall of the source trench from the bottom surface up to a height lower than the top surface, creating vertical electrical connection paths that were not present in conventional planar structures. This dimensional change enables effective source-grounding while maintaining the compact trench structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The source region is nested within and along the side wall of the source trench, with the source region vertically encompassing the side wall. This nesting arrangement allows the source region to be integrated within the three-dimensional space of the trench structure, achieving both miniaturization and reliable source-grounding by utilizing the vertical space along the trench side wall.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Manufacturing precision

If the source electrode is embedded deep in the source trench, then source region control is improved, but manufacturing complexity and difficulty increase

Engineering Contradiction:
Improvesource region controlVSAvoidmanufacturing difficulty
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The source region is formed in advance during the epitaxial growth process, before subsequent processing steps. By forming the source region with appropriate doping during the initial epitaxial growth that creates the semiconductor layer, the patent establishes the vertical source region structure early in the manufacturing process. This preliminary formation of the source region simplifies later steps and reduces overall manufacturing complexity while maintaining precise source region control.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250040211A1SiC SEMICONDUCTOR DEVICE
Publication Date: 2025.01.30 ROHM CO LTD
  • US20250040211A1 patent drawing
  • US20250040211A1 patent drawing
  • US20250040211A1 patent drawing

AI summary

An SiC semiconductor device includes an SiC semiconductor layer of a first conductivity type having a main surface, a source trench formed in the main surface and having a side wall and a bottom wall, a source electrode embedded in the source trench and having a side wall contact portion in contact with a region of the side wall of the source trench at an opening side of the source trench, a body region of a second conductivity type formed in a region of a surface layer portion of the main surface along the source trench, and a source region of the first conductivity type electrically connected to the side wall contact portion of the source electrode in a surface layer portion of the body region.