Single-Crystal SiC Stack Orientation for Defect Blocking
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Solution Overview
Problem
The manufacturing of single-crystal SiC substrates with low defect densities is costly, and the transfer of thin SiC layers onto low-cost substrates can lead to defect propagation during electronic device manufacturing, affecting the electric performance of power electronic components.
Innovation Solution
A stack comprising a support substrate with a high density of basal plane dislocations (>1,000 defects/cm2) and a single-crystal SiC layer with a lower defect density (<250 BPD defects/cm2), where the layer's surface is inclined by at least 1° relative to the support substrate's (0001) plane, is used, with mechanical contact and epitaxial growth to prevent defect propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a thin single-crystal SiC layer is transferred onto a low-cost support substrate, then manufacturing cost is reduced, but defects propagate from the support substrate into the electronic device during subsequent high thermal budget steps
Solution Approach 1:
A buffer layer is introduced between the thin single-crystal SiC layer and the support substrate to act as an intermediary. This buffer layer has a defect density lower than the support substrate, preventing defect propagation while maintaining the cost advantage of using a low-cost support substrate. The buffer layer mediates the interaction between the high-quality thin SiC layer and the low-cost defective substrate.
Solution Approach 2:
The patent applies different quality levels to different regions of the structure: the thin SiC layer maintains very low defect density for device performance, the buffer layer has intermediate defect density for defect blocking, and the support substrate has high defect density for cost reduction. This local differentiation of quality allows each layer to fulfill its specific function optimally.
2Reliability
If a single-crystal SiC substrate with low defect density is manufactured, then electric performance of power electronic components is improved, but manufacturing cost increases significantly
Solution Approach 1:
The structure is segmented into three distinct layers with different defect densities: the thin SiC layer (lowest defects) for device formation, the buffer layer (intermediate defects) for defect management, and the support substrate (highest defects) for cost reduction. This segmentation allows the expensive low-defect material to be used only where absolutely necessary for device performance.
Solution Approach 2:
The patent changes the defect density parameter across different layers of the structure. By creating a gradient in defect density from the support substrate through the buffer layer to the thin SiC layer, the system achieves both cost effectiveness and high electric performance, as each layer's defect density is optimized for its specific function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs while maintaining the quality of the SiC layer, preventing defect propagation from the support substrate and ensuring the electric performance of electronic devices, particularly power electronic components.
Implementation Method 1
the layer's surface is inclined by at least 1° relative to the support substrate's (0001) plane, is used, with mechanical contact and epitaxial growth to prevent defect propagation
Data Source
AI summary
An electronic device including a stack of a support substrate made of single-crystal SiC having a first surface and of a layer made of single-crystal SiC including a second surface opposite the first surface. The first surface corresponds to a plane of the SiC single crystal of the support substrate and the second surface corresponds to a plane inclined by at least 1° with respect to a plane in the direction of the SiC single crystal of the layer.


