SiC Semiconductor Stack Recessed Portion Density Control
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Solution Overview
Problem
The reliability of SiC semiconductor devices is compromised due to electronic field concentration caused by variations in oxide film thickness, particularly when numerous second recessed portions are present on the epi principal surface, leading to decreased operational reliability.
Innovation Solution
A semiconductor stack with a silicon carbide substrate and epi layer featuring a carbon surface off-angle of 4° or smaller, where the density of second recessed portions is reduced to 10 cm−2 or lower, inhibiting the decrease in operational reliability by minimizing film thickness variations and threading dislocation effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If numerous second recessed portions are formed in the epi principal surface, then the manufacturing process can address threading dislocations, but electronic field concentration occurs due to oxide film thickness variations, decreasing operational reliability
Solution Approach 1:
The patent changes the density parameter of second recessed portions from high to low (≤10 cm⁻²), transforming the surface structure to prevent oxide film thickness variations that cause electronic field concentration, thereby resolving the contradiction between dislocation management and film uniformity
Solution Approach 2:
The patent applies local quality by selectively distributing second recessed portions at low density across the epi principal surface, creating localized modifications that address threading dislocations without causing widespread oxide film thickness variations, thus maintaining overall film consistency while managing defects
2Manufacturing precision
If the density of second recessed portions is high, then threading dislocations can be managed, but film thickness variations increase causing electronic field concentration
Solution Approach 1:
The patent optimizes the density parameter of second recessed portions to ≤10 cm⁻², finding the optimal balance point where threading dislocations are sufficiently managed while oxide film thickness variations remain minimal, preventing electronic field concentration and maintaining operational reliability
3Ease of manufacture
If oxide film thickness varies significantly, then manufacturing flexibility is improved, but electronic field concentration occurs decreasing device reliability
Solution Approach 1:
The patent establishes a specific parameter range for second recessed portion density (≤10 cm⁻²) that simultaneously achieves manufacturing flexibility through controlled surface modification while maintaining oxide film thickness consistency to prevent electronic field concentration, thus resolving the contradiction between ease of manufacture and reliability
Data Source
AI summary
A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is formed. Density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm−2 in the epi principal surface.


