SiC Substrate Heat Treatment for Defect Reduction

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Solution Overview

Problem

SiC substrates and epitaxial layers suffer from crystal defects such as basal plane dislocation (BPD) and step bunching, which adversely affect the performance and reliability of SiC semiconductor devices.

Innovation Solution

A method involving a heat treatment step that includes strained layer removal, bunching removal, and basal plane dislocation reduction, performed in a semi-closed space using a SiC material with controlled temperature gradients and vapor pressure environments, to produce high-quality SiC substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional SiC substrate production methods are used, then manufacturing simplicity is maintained, but crystal defects such as basal plane dislocation and step bunching occur

Engineering Contradiction:
Improvecrystal qualityVSAvoidproduction process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The heat treatment process is divided into multiple sequential steps with different temperature ranges and atmospheric conditions: first heat treatment (1400-1700°C) for strained layer removal, second heat treatment (1700-2000°C) for bunching removal, and third heat treatment (2000-2300°C) for basal plane dislocation reduction. Each step targets specific defects, allowing systematic improvement of crystal quality without requiring complete process redesign.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention systematically varies multiple parameters including temperature (1400-2300°C range), atmospheric composition (SiC-Si equilibrium, SiC-C equilibrium, or vacuum), and treatment sequence to optimize defect removal. By changing these parameters across different heat treatment steps, the process effectively addresses multiple defect types while maintaining manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If heat treatment is performed to remove strained layers and reduce dislocations, then crystal quality improves, but production time and energy consumption increase

Engineering Contradiction:
Improvedevice reliabilityVSAvoidproduction cycle time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The heat treatment process maintains continuous useful action by performing multiple defect removal functions in sequential steps without interrupting the fundamental heat treatment mechanism. Each step builds upon the previous one, with the SiC substrate undergoing progressive refinement through controlled temperature and atmospheric variations, maximizing efficiency within the extended time frame.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The first heat treatment step performs preliminary removal of strained layers before subsequent steps address more complex defects like step bunching and basal plane dislocations. This preliminary action simplifies the substrate structure early in the process, making subsequent defect removal more effective and potentially reducing the intensity required in later steps.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If multiple heat treatment steps are applied to reduce basal plane dislocation, then BPD density decreases, but process complexity increases

Engineering Contradiction:
Improveepitaxial layer qualityVSAvoidheat treatment process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Each heat treatment step is optimized for specific local quality improvements: the first step targets strained layers near the surface, the second step addresses step bunching in the mid-depth region, and the third step focuses on basal plane dislocations throughout the substrate. This localized approach to quality improvement allows systematic defect removal without requiring all parameters to be optimized simultaneously, reducing overall process complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces strained layers, BPD, and step bunching, leading to improved performance and reliability of SiC semiconductor devices by suppressing defect generation and propagation.

Implementation Method 1

a heat treatment step (S1) of heat-treating a SiC base substrate (10)

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Implementation Method 2

etching the SiC base substrate (10) by heat treatment in a SiC-C equilibrium vapor pressure environment, or etching the SiC base substrate (10) by heat treatment in a SiC-Si equilibrium vapor pressure environment

Methodology Applied
Scientific EffectVapor pressure equilibrium: Vapour Pressure

Implementation Method 3

performing heating so as to form a temperature gradient between the SiC base substrate (10) and the SiC material in the container (20) made of SiC

Methodology Applied
Scientific EffectTemperature gradient: Temperature Gradient

Data Source

PatentEP4012079B1Method for producing a sic substrate
Publication Date: 2025.10.15 TOYOTA TSUSHO CORP
  • EP4012079B1 patent drawingFigure 1
  • EP4012079B1 patent drawingFigure 2~3
  • EP4012079B1 patent drawingFigure 4~5

AI summary

The present invention addresses the problem of providing a novel technology which enables the achievement of a high-quality SiC substrate, a high-quality SiC epitaxial substrate, and a high-quality SiC ingot. The present invention is a method for producing an SiC substrate 11, said method comprising a heat treatment step S1 for heat treating an SiC base substrate 10, said heat treatment step S1 comprising two or more steps among the steps (a), (b) and (c) described below. (a) a strained layer removal step S11 for removing a strained layer 101 of the SiC base substrate 10. (b) a bunching removal step S12 for removing macro-step bunching (MSB) on the SiC base substrate 10. (c) a basal plane dislocation reduction step S13 for forming a growth layer 105, in which basal plane dislocations (BPD) are reduced, on the SiC base substrate 10.