Defect-Free Silicon Carbide Substrate via Sacrificial Heteroepitaxy
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Solution Overview
Problem
Current semiconductor devices with silicon carbide (SiC) substrates face high defect densities and radiation vulnerability, particularly in aerospace applications, due to lattice mismatch and thermal expansion differences between SiC and Si, leading to reliability issues like single event burnout and increased threshold leakage current.
Innovation Solution
A method is developed to form a substantially defect-free SiC substrate using a sacrificial heteroepitaxy interface with inverted pyramid patterns and micropillars, followed by direct wafer bonding and removal of sacrificial layers, which confines defects to removable layers, reducing lattice mismatch and thermal stress, and enhances radiation hardness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If SiC layer is formed on Si substrate, then high breakdown voltage and high power density are achieved, but defect density increases due to lattice mismatch and thermal expansion differences
Solution Approach 1:
A buffer layer is introduced between the Si substrate and the SiC layer to act as an intermediary that reduces lattice mismatch and thermal expansion differences. This buffer layer absorbs the mechanical stress and prevents defect propagation from the Si substrate to the SiC layer, enabling high power density devices with lower defect density.
Solution Approach 2:
The SiC layer is grown in multiple segments or stages with intermediate annealing and stress relief processes. By segmenting the growth process into controlled stages, the accumulated stress from lattice mismatch is periodically relieved, preventing the formation of large-scale defects while maintaining the high breakdown voltage characteristics.
2Ease of manufacture
If conventional SiC substrate methods are used, then manufacturing is simplified, but radiation hardness is insufficient for aerospace applications
Solution Approach 1:
The manufacturing process parameters are changed to include specific ion implantation doses, energy levels, and thermal annealing conditions that enhance radiation hardness. By modifying these process parameters, the SiC substrate gains improved resistance to radiation-induced defects while maintaining compatibility with conventional fabrication workflows.
Solution Approach 2:
Radiation hardening treatments are performed as preliminary actions during the manufacturing process, before the device is deployed in aerospace applications. Ion implantation and thermal annealing are applied in advance to pre-condition the SiC substrate, creating a more radiation-resistant structure that will withstand subsequent exposure to cosmic rays and radiation in space environments.
3Reliability
If defect reduction techniques are applied to SiC substrate, then reliability improves, but manufacturing cost increases
Solution Approach 1:
A sacrificial buffer layer is used that is intentionally designed to be removed after serving its purpose of reducing defects during growth. This disposable layer absorbs the cost of complex processing but eliminates the need for expensive permanent defect mitigation structures, ultimately reducing overall manufacturing costs while improving substrate reliability.
Solution Approach 2:
The buffer layer is discarded after fulfilling its defect-reduction function, and the process is recovered by directly growing the device layer on the cleaned substrate. This approach eliminates the need to maintain complex multi-layer structures throughout production, simplifying subsequent manufacturing steps and reducing costs while achieving high reliability through the temporary presence of the buffer layer during critical growth phases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a nearly defect-free SiC substrate that is radiation hardened, improving reliability and reducing manufacturing costs, capable of withstanding high-energy radiation without permanent destructive effects, while maintaining low on-resistance and high breakdown voltage.
Implementation Method 1
forming a substantially defect-free SiC substrate using a sacrificial heteroepitaxy interface with inverted pyramid patterns and micropillars
Implementation Method 2
followed by direct wafer bonding and removal of sacrificial layers
Data Source
AI summary
A semiconductor device has a first substrate and a first semiconductor layer having a first semiconductor material formed over the first substrate. A surface of the first semiconductor layer has a first element of the first semiconductor material. A first surface of a second semiconductor layer having the first semiconductor material is joined to the surface of the first semiconductor layer. The first surface of the second semiconductor layer has a second element of the first semiconductor material different from the first element. The first semiconductor material is silicon carbide or cubic silicon carbide. The first element is silicon or carbon, and the second element is carbon or silicon. The semiconductor device provides characteristics of radiation hardening. A third semiconductor layer is formed over a second surface of the second semiconductor layer opposite the first surface. An electrical component is formed over the second semiconductor layer.