Silicon Carbide Substrate Defect Control via Vibration

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Solution Overview

Problem

Existing methods for manufacturing silicon carbide substrates with low defect densities are unstable and inefficient, making it difficult to consistently produce high-performance semiconductor devices.

Innovation Solution

A silicon carbide substrate with specific defect density parameters (micropipe density ≤ 7 cm−2, threading screw dislocation density ≤ 1×10^4 cm−2, threading edge dislocation density ≤ 1×10^4 cm−2, basal plane dislocation density ≤ 1×10^4 cm−2, stacking fault density ≤ 0.1 cm−1, conductive impurity concentration ≥ 1×10^18 cm−3, residual impurity concentration ≤ 1×10^16 cm−3, and secondary phase inclusion density ≤ 1 cm−3) is developed, along with a method involving seed crystal preparation and sublimation growth with controlled vibration in a processing container.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional manufacturing methods are used, then production stability is improved, but defect density (micropipe, dislocation, impurity) increases

Engineering Contradiction:
Improvedevice performanceVSAvoiddefect density
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by precisely controlling multiple crystallization parameters including temperature gradient (15-30°C/mm), pressure (0.1-10 kPa), and vibration parameters (frequency 10-100 Hz, amplitude 0.1-1 mm) during the sublimation growth process. These parameter optimizations enable stable production of silicon carbide substrates with micropipe density ≤7 cm⁻² and dislocation density ≤1×10⁴ cm⁻², resolving the contradiction between manufacturing stability and defect reduction.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If vibration is applied during crystal growth, then defect density is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvedefect densityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies mechanical vibration during the sublimation growth process with specific parameters (frequency 10-100 Hz, amplitude 0.1-1 mm) to prevent micropipe formation and reduce dislocation density. The vibration mechanism creates controlled disturbances in the vapor phase that inhibit defect formation during crystal growth. This approach achieves micropipe density ≤7 cm⁻² while managing process complexity through standardized vibration control systems.

Inventive Principle:
Principle #18Mechanical vibration

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach results in a silicon carbide substrate that reduces defect densities in epitaxial layers, improving device performance, breakdown voltage, and long-term reliability while minimizing manufacturing costs.

Implementation Method 1

growing silicon carbide on a surface of the seed crystal substrate by sublimation by placing the seed crystal substrate and the source powder in a processing container

Methodology Applied
Scientific EffectSublimation: Sublimation

Data Source

PatentUS11242618B2Silicon carbide substrate and method of manufacturing the same
Publication Date: 2022.02.08 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US11242618B2 patent drawing
  • US11242618B2 patent drawing
  • US11242618B2 patent drawing

AI summary

A silicon carbide substrate capable of stably forming a device of excellent performance, and a method of manufacturing the same are provided. A silicon carbide substrate is made of a single crystal of silicon carbide, and has a width of not less than 100 mm, a micropipe density of not more than 7 cm−2, a threading screw dislocation density of not more than 1×104 cm−2, a threading edge dislocation density of not more than 1×104 cm−2, a basal plane dislocation density of not more than 1×104 cm−2, a stacking fault density of not more than 0.1 cm−1, a conductive impurity concentration of not less than 1×1018 cm−3, a residual impurity concentration of not more than 1×1016 cm−3, and a secondary phase inclusion density of not more than 1 cm−3.