Silicon Carbide Substrate Cooling to Cut Voids Without Cracks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge is to reduce the area density of voids in silicon carbide substrates while preventing the occurrence of cracks during the manufacturing process, as existing methods fail to effectively suppress both issues.

Innovation Solution

A silicon carbide substrate is manufactured by growing a silicon carbide crystal on a seed substrate using a sublimation process, with controlled cooling rates between 23° C./min to 36° C./min in the temperature range of 1400° C. to 1600° C., and further cooling at a rate less than 23° C./min from 1000° C. to 1400° C., to manage vacancy supersaturation and stress relaxation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional cooling rates are used after crystal growth, then manufacturing process is simple, but void density increases to unacceptable levels

Engineering Contradiction:
Improvevoid densityVSAvoidcooling process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The cooling process is divided into multiple stages with different cooling rates. The first cooling stage uses a first cooling rate immediately after crystal growth, followed by a second cooling stage with a second cooling rate. This segmentation allows optimization of void density control while managing process complexity through structured multi-stage cooling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cooling rate parameter is dynamically adjusted during the cooling process. By changing the cooling rate from the first cooling rate to the second cooling rate between different temperature ranges, the patent achieves superior void density control. This parameter change approach transforms a single-parameter process into a multi-regime process that optimizes crystal quality.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If cooling rate is increased to reduce voids, then void density decreases, but thermal stress increases causing cracks

Engineering Contradiction:
Improvevoid densityVSAvoidcrack resistance
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The cooling rate is made dynamic rather than static, adjusting the cooling speed at different stages of the cooling process. The first cooling rate is applied initially, then transitioned to a second cooling rate. This dynamic adjustment allows the system to reduce voids during the first stage while preventing excessive thermal stress during the second stage, thereby maintaining crack resistance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The cooling rate parameter is changed between different cooling stages to balance void reduction and stress control. By implementing a first cooling rate followed by a second cooling rate, the patent optimizes the balance between minimizing void density and preventing thermal stress-induced cracking.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If single-stage cooling is used, then process time is short, but void density becomes too high

Engineering Contradiction:
Improvevoid densityVSAvoidcooling process time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The cooling process is segmented into multiple stages, each optimized for specific objectives. The first cooling stage addresses rapid void formation control, while the second cooling stage focuses on stress relaxation and final void density reduction. This segmentation achieves superior void density control without requiring excessively long total cooling time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The multi-stage cooling process maintains continuous useful action throughout the cooling period. Each stage contributes to void density reduction, with the first stage addressing immediate post-growth conditions and the second stage completing the void elimination. This continuous optimized action achieves better void density control more efficiently than extended single-stage cooling.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces the area density of voids to 0.7/cm2 or less and suppresses crack occurrence, thereby improving the yield and quality of silicon carbide semiconductor devices.

Implementation Method 1

A silicon carbide crystal is grown on the seed substrate by sublimating the silicon carbide source material

Methodology Applied
Scientific EffectSublimation: Sublimation

Implementation Method 2

a rate of cooling the silicon carbide crystal in a temperature range where the silicon carbide crystal has a temperature of 1400° C. to 1600° C. is 23° C./min to 36° C./min

Methodology Applied
Scientific EffectCooling: Cooling

Data Source

PatentUS20250006796A1Silicon carbide substrate and method of manufacturing silicon carbide substrate
Publication Date: 2025.01.02 DENSO CORP
  • US20250006796A1 patent drawing
  • US20250006796A1 patent drawing
  • US20250006796A1 patent drawing

AI summary

A silicon carbide substrate includes a first main surface and a second main surface opposite to the first main surface. A void is present in the silicon carbide substrate. An area density of the void in the first main surface is 0.7/cm2 or less. A width of the void is 10 μm to 80 μm when viewed in a direction perpendicular to the first main surface. In a cross-section perpendicular to the first main surface, the width of the void decreases from the first surface toward the second surface when viewed in a direction parallel to the first main surface. A depth of the void is larger than or equal to the width of the void in the first main surface and smaller than a thickness of the silicon carbide substrate when viewed in the direction parallel to the first main surface.