SiC Super Junction Drift Layer Implantation for Charge Balance
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Solution Overview
Problem
Silicon carbide semiconductor devices face challenges in achieving a balance between breakdown voltage and on-resistance due to unevenness in epitaxial concentration and film thickness, leading to charge imbalance and reduced performance in super junction structures.
Innovation Solution
A manufacturing method that involves measuring impurity concentration and film thickness, and using feedforward control in ion implantation to adjust the ion implantation amount and energy, ensuring a positive correlation with measurement results to minimize charge imbalance and optimize the super junction structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the thickness of the drift layer is reduced or the impurity concentration of the drift layer is increased to reduce on-resistance, then the on-resistance decreases, but the breakdown voltage is reduced
Solution Approach 1:
The drift layer is segmented into multiple regions with different impurity concentrations through ion implantation, creating a non-uniform concentration profile that optimizes both breakdown voltage and on-resistance simultaneously
Solution Approach 2:
Different regions of the drift layer are given different local properties through controlled ion implantation, with higher impurity concentration in certain areas to reduce resistance while maintaining lower concentration in other areas to preserve breakdown voltage
2Manufacturing precision
If the impurity concentration of the drift layer is increased to reduce on-resistance, then the on-resistance decreases, but the charge balance in the super junction structure is disrupted
Solution Approach 1:
The ion implantation process uses feedback control where the actual impurity concentration measured in the drift layer is used to adjust the implantation dose, ensuring the target charge balance is achieved despite variations in epitaxial growth
Solution Approach 2:
The impurity concentration profile is optimized by changing the implantation parameters (dose, energy, depth) to achieve the desired charge balance while minimizing on-resistance
3Stability of the object's composition
If feedforward control is applied to ion implantation amount based on measurement results, then the charge imbalance is reduced, but the manufacturing process complexity increases
Solution Approach 1:
Measurements of the drift layer impurity concentration are performed before the ion implantation process, and the implantation parameters are predetermined based on these measurements, allowing for compensation of epitaxial variations without complex real-time control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces charge imbalance and maintains breakdown voltage while reducing on-resistance, enhancing the performance of silicon carbide semiconductor devices by ensuring uniformity in epitaxial layers and pillar regions.
Implementation Method 1
implant impurity ions of a second conductivity type through the plurality of first openings, form a plurality of second pillar regions of the second conductivity type in the drift layer
Implementation Method 2
form a drift layer of a first conductivity type on a silicon carbide semiconductor substrate of the first conductivity type through epitaxial growth
Implementation Method 3
the drift layer required to have low impurity concentration is formed with an epitaxial growth method (hereinafter, epitaxial growth) using the chemical vapor deposition (CVD) method
Data Source
AI summary
The following steps (a) to (d) are provided. The step (a) is to form a drift layer of an n type on a silicon carbide semiconductor substrate of the n type through epitaxial growth. The step (b) is to measure impurity concentration of the drift layer. The step (c) is to form an ion implantation mask on the drift layer, the ion implantation mask including a plurality of first openings being periodically provided. The step (d) is to implant impurity ions of a p type through the plurality of first openings, form a plurality of second pillar regions of the p type in the drift layer, and turn the drift layer between the plurality of second pillar regions into a first pillar region. The step (d) includes performing feedforward control on an ion implantation amount so that there is a positive correlation with measurement results of the step (b).


