SiC Superjunction Ion Implantation Charge Balance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Producing a superjunction structure within semiconductor devices with sufficient accuracy, especially when the diffusion coefficient of the semiconductor body material is small, is challenging due to difficulties in achieving precise charge compensation, leading to high on-state resistance and waviness in junction areas.
Innovation Solution
A semiconductor device with a dopant diffusion coefficient smaller than silicon is created, featuring columnar semiconductor regions doped with specific conductivity types, where the transition between these regions forms a straight line in a vertical cross-section, reducing waviness and improving charge balance through precise implantation techniques and energy diffusor assemblies to control ion implantation depths and concentrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional diffusion methods are used to produce superjunction structure, then manufacturing process is simple, but manufacturing precision is insufficient due to small diffusion coefficient
Solution Approach 1:
The patent applies preliminary action by performing multiple ion implantation steps before final thermal processing. The superjunction structure is formed by sequentially implanting first and second dopants to predetermined depths, then performing a final thermal processing step that completes the doping profiles. This preliminary structuring through multiple implantation steps enables precise charge compensation despite the small diffusion coefficient of SiC, as each implantation step can be independently controlled to achieve the desired depth and concentration profiles.
Solution Approach 2:
The patent employs parameter changes by varying ion implantation energies, doses, and temperatures across multiple processing steps. Different implantation energies are used to achieve different dopant depths, while controlled thermal processing at specific temperatures activates the dopants and creates the desired electrical profiles. These parameter adjustments enable precise control over the superjunction structure formation, achieving high manufacturing precision for charge compensation in SiC materials with small diffusion coefficients.
2Manufacturing precision
If ion implantation is used to achieve precise doping, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the doping process into distinct sequential steps: first dopant implantation to a first predetermined depth, second dopant implantation to a second predetermined depth, and final thermal processing. Each step is independently controlled and optimized, allowing precise doping depth control through separate parameter sets for each implantation. This segmented approach manages device complexity by breaking down the complex doping profile formation into manageable, independently controllable stages.
Solution Approach 2:
The patent employs periodic action through repeated cycles of ion implantation followed by thermal processing steps. Multiple implantation steps are performed periodically, with each cycle depositing dopants at controlled depths and concentrations. The periodic alternation between implantation and thermal processing allows systematic building of the superjunction structure, achieving precise doping depth control while managing process complexity through a repeatable, modular sequence of operations.
3Reliability
If superjunction structure is produced in SiC, then on-state resistance decreases, but manufacturing precision is challenging due to small diffusion coefficient
Solution Approach 1:
The patent applies preliminary action by performing multiple ion implantation steps to establish the superjunction structure before final thermal processing. The first and second dopants are implanted to predetermined depths to create the alternating n-type and p-type columns, then a final thermal processing step activates the dopants and completes the electrical profiles. This preliminary structuring through controlled implantation enables precise junction formation in SiC, achieving the low on-state resistance required for high reliability while overcoming the small diffusion coefficient that would otherwise prevent accurate charge compensation.
4Manufacturing precision
If multiple implantation steps are performed, then charge compensation accuracy improves, but production time increases
Solution Approach 1:
The patent employs periodic action through repeated cycles of ion implantation followed by thermal processing steps. Multiple implantation steps are performed periodically, with each cycle depositing dopants at controlled depths and concentrations. The periodic alternation between implantation and thermal processing allows systematic building of the superjunction structure with high charge balance accuracy. While this periodic multi-step approach increases production cycle time compared to single-step methods, it achieves the precise charge compensation required for low on-state resistance in SiC superjunction devices.
Solution Approach 2:
The patent employs parameter changes by varying ion implantation energies, doses, and temperatures across multiple processing steps to optimize both charge balance accuracy and production efficiency. Each implantation step uses specifically tailored parameters to achieve the desired dopant depth and concentration, while thermal processing parameters are optimized to activate dopants efficiently. These parameter adjustments enable high charge compensation accuracy while minimizing the total number of steps and overall production time required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a semiconductor device with low on-state resistance and reduced switching losses, achieving a high degree of charge compensation and improved performance by minimizing waviness in junction areas, thus enhancing the efficiency of power semiconductor devices.
Implementation Method 1
producing the at least one first semiconductor region includes applying a first implantation of first implantation ions; and producing, in the semiconductor body, at least one second semiconductor region adjacent to the at least one first semiconductor region and doped with dopants of a second conductivity type complementary to the first conductivity type, wherein producing the at least one second semiconductor region includes applying a second implantation of second implantation ions
Data Source
AI summary
A method of producing a semiconductor device includes providing a semiconductor body including a semiconductor body material having a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon. At least one first semiconductor region doped with dopants of a first conductivity type is produced in the semiconductor body, including by applying a first implantation of first implantation ions. At least one second semiconductor region adjacent to the at least one first semiconductor region and doped with dopants of a second conductivity type complementary to the first conductivity type is produced in the semiconductor body, including by applying a second implantation of second implantation ions.