Silicon Carbide Substrate Surface Doping for Leakage Isolation
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Solution Overview
Problem
The high production cost of semi-insulating silicon carbide wafers limits their widespread use in semiconductor devices, and existing N-type silicon carbide wafers are prone to leakage and short circuits due to low electrical resistivity, which affects the quality and performance of semiconductor devices.
Innovation Solution
A manufacturing method that converts the surface of N-type silicon carbide substrates into semi-insulating-type silicon carbide regions through doping with specific dopants like group VB elements, argon, and silicon, followed by an annealing process, to achieve high electrical resistivity and improve epitaxial layer matching, thereby reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semi-insulating silicon carbide wafers are used as substrates, then the electrical resistivity is high (greater than 10^5 ohm-cm) and leakage/short circuit problems are reduced, but the production cost is high
Solution Approach 1:
The patent applies local quality by creating a semi-insulating region only at the surface layer of the N-type silicon carbide substrate through selective doping with group VB elements or argon ions. This allows the substrate to have high electrical resistivity where needed (at the surface for epitaxial growth) while maintaining the bulk N-type material's lower cost characteristics. The semi-insulating region is formed locally rather than throughout the entire substrate.
Solution Approach 2:
The patent changes the electrical parameter (resistivity) of the substrate surface by introducing dopants (group VB elements like nitrogen or phosphorus, or argon ions) into the N-type silicon carbide. This parameter change transforms the surface region from conductive N-type to semi-insulating, enabling high-resistivity epitaxial growth without requiring a completely different substrate type.
2Ease of manufacture
If N-type silicon carbide wafers are used as substrates, then the production cost is low, but the electrical resistivity is low causing leakage and short circuit problems
Solution Approach 1:
The patent maintains the low-cost N-type bulk substrate while introducing a localized semi-insulating surface region through doping. This local modification provides the high electrical resistivity needed for reliable device operation without requiring expensive semi-insulating bulk substrates throughout the entire wafer.
Solution Approach 2:
The patent creates a composite structure within the substrate by combining N-type silicon carbide (bulk) with a semi-insulating surface layer (formed by doping). This composite approach allows the substrate to exhibit both low-cost characteristics (N-type bulk) and high-reliability characteristics (semi-insulating surface) simultaneously.
3Manufacturing precision
If conventional doping methods are used to form semi-insulating regions, then the production cost increases, but the epitaxial layer quality improves
Solution Approach 1:
The patent uses group VB elements (nitrogen, phosphorus) or argon ions as intermediary dopants to achieve the semi-insulating state. These intermediaries modify the electrical properties of the N-type substrate surface, enabling high-quality epitaxial growth. The intermediaries act as a bridge between the conductive N-type bulk and the required semi-insulating surface condition.
Solution Approach 2:
The patent changes the chemical composition parameter by introducing specific dopants (group VB elements or argon) at controlled concentrations in the surface region. This parameter change achieves the semi-insulating state with optimized electrical properties for epitaxial growth, improving manufacturing precision without requiring complete substrate replacement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the production cost of semi-insulating silicon carbide substrates while enhancing the quality and performance of semiconductor devices by achieving superior lattice matching and reducing defects in the epitaxial layers.
Implementation Method 1
A doping process is performed on the first surface of the N-type silicon carbide substrate to form a semi-insulating-type silicon carbide region extending from the first surface into the N-type silicon carbide substrate to a depth. The semi-insulating-type silicon carbide region includes nitrogen element and a first dopant.
Implementation Method 2
An annealing process is performed on the semi-insulating-type silicon carbide region.
Data Source
AI summary
A silicon carbide substrate includes an N-type silicon carbide substrate having a first surface and a second surface opposite to the first surface. The N-type silicon carbide substrate includes a semi-insulating silicon carbide region and an N-type silicon carbide region. The semi-insulating silicon carbide region extends inward from the first surface into the N-type silicon carbide substrate to a depth. The semi-insulating silicon carbide region includes nitrogen and a first dopant. The first dopant includes at least one of group VB elements, group VIIA elements, argon and silicon. The N-type silicon carbide region is adjacent to the semi-insulating silicon carbide region and includes nitrogen element.