SiC Semiconductor Terminal Structure for Breakdown Voltage
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Solution Overview
Problem
The existing terminal structures in silicon carbide semiconductor elements often fail to achieve the intended breakdown voltage due to electric field overconcentration at the interface between ring regions and the drift region, leading to a decrease in breakdown voltage and increased size of the semiconductor element.
Innovation Solution
A semiconductor element with a terminal structure comprising high concentration and low concentration ring regions formed by ion implantation, where the high concentration ring region contacts the surface and the low concentration ring region is deeper, with a diode region between the unit cell and terminal region, allowing for controlled impurity concentration and thickness adjustments to minimize breakdown voltage loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional terminal structure with uniform ring regions is used, then the manufacturing process is simple, but electric field overconcentration occurs at the interface between ring regions and drift region, causing breakdown voltage to decrease
Solution Approach 1:
The patent applies local quality by creating ring regions with different impurity concentrations at different locations. Specifically, the first ring region has a first impurity concentration while the second ring region has a second impurity concentration different from the first. This non-uniform doping distribution locally optimizes the electric field characteristics at the interface between ring regions and drift region, preventing electric field overconcentration and maintaining high breakdown voltage.
Solution Approach 2:
The patent changes the impurity concentration parameter across different ring regions to optimize performance. By varying the impurity concentration (first impurity concentration in first ring region, second impurity concentration in second ring region), the patent adjusts the electrical characteristics to prevent breakdown voltage degradation while managing device complexity.
2Reliability
If the terminal region area is increased to compensate for breakdown voltage loss, then breakdown voltage can be maintained, but the chip area increases
Solution Approach 1:
By implementing non-uniform impurity concentrations in different ring regions, the patent locally optimizes the electric field distribution. This allows the terminal region to maintain adequate breakdown voltage performance without requiring an increased terminal region area, thereby preventing chip area expansion.
3Manufacturing precision
If ion implantation is performed multiple times with different masks to create high and low concentration regions, then precise impurity concentration control is achieved, but the manufacturing process becomes complex
Solution Approach 1:
The patent performs preliminary action by forming a single mask pattern that defines both the first ring region and the second ring region before ion implantation. This preliminary mask formation enables subsequent ion implantation to create different impurity concentrations in different ring regions without requiring multiple mask fabrication steps, thus achieving precise impurity concentration control while maintaining manufacturing simplicity.
Solution Approach 2:
The patent merges the formation of multiple ring regions with different impurity concentrations into a single ion implantation process step. By using one mask to define multiple implantation regions, the patent combines what would otherwise require separate masking and implantation steps, reducing manufacturing complexity while achieving the desired impurity concentration distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively reduces electric field overconcentration, maintains higher breakdown voltage, and allows for a smaller semiconductor element size, thereby minimizing the decrease in breakdown voltage and reducing the chip area, enhancing the semiconductor element's performance and efficiency.
Implementation Method 1
a method for fabricating the semiconductor element includes the step of forming the high concentration ring region and the low concentration ring region by implanting ions of an impurity of the second conductivity type into respective portions of the first silicon carbide semiconductor layer using a same implantation mask
Data Source
Figure 1(a)~1(b)
Figure 2
Figure 3(a)~3(c)
AI summary
As viewed along a normal to the principal surface of a substrate 101, this semiconductor element 100 has a unit cell region 100ul and a terminal region 100f located between the unit cell region and an edge of the semiconductor element. The terminal region 100f includes a ring region 103f of a second conductivity type which is arranged in a first silicon carbide semiconductor layer 102 so as to contact with a drift region 102d. The ring region includes a high concentration ring region 103af which contacts with the surface of the first silicon carbide semiconductor layer and a low concentration ring region 103bf which contains an impurity of the second conductivity type at a lower concentration than in the high concentration ring region and of which the bottom contacts with the first silicon carbide semiconductor layer. A side surface of the high concentration ring region 103af contacts with the drift region 102d. As viewed along a normal to the principal surface of the semiconductor substrate, the high concentration ring region and the low concentration ring region are identical in contour.