SiC Power Device Terminal Field Relaxation
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Solution Overview
Problem
Conventional power semiconductor devices struggle to simultaneously reduce on-resistance and improve withstand-voltage keeping capability, affecting yield rate and reliability.
Innovation Solution
A power semiconductor device with a first conductivity-type silicon carbide semiconductor layer, a switching device, a second conductivity-type electric field relaxation impurity region, and a first conductivity-type added region with higher impurity concentration between well regions, which relaxes the electric field and reduces on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If an n-type region with higher concentration than drift region is formed between p-wells to reduce on-resistance, then on-resistance decreases, but depletion layer elongation in terminal portion increases which deteriorates withstand-voltage keeping capability
Solution Approach 1:
The invention applies local quality by forming an n-type added region with higher impurity concentration specifically in the terminal portion outer side, while maintaining lower concentration in the cell region between p-wells. This spatial differentiation of impurity concentration allows the terminal portion to suppress depletion layer elongation (improving withstand voltage) while the cell region maintains low on-resistance. The n-type added region is positioned at a specific location (outer side of terminal portion) with specific concentration gradient to achieve localized electric field control.
Solution Approach 2:
The invention changes the impurity concentration parameter by forming an n-type added region with higher impurity concentration than the drift region in the terminal portion. This parameter change (increasing impurity concentration in terminal portion) modifies the electric field distribution, suppressing depletion layer elongation and improving withstand-voltage keeping capability while maintaining low on-resistance through proper concentration gradient design.
2Reliability
If conventional terminal structures are used to maintain withstand voltage, then withstand-voltage keeping capability is maintained, but on-resistance remains high and yield rate decreases
Solution Approach 1:
The invention applies local quality by forming an n-type added region with higher impurity concentration specifically in the terminal portion outer side, while maintaining lower concentration in the cell region between p-wells. This spatial differentiation of impurity concentration allows the terminal portion to suppress depletion layer elongation (improving withstand voltage) while the cell region maintains low on-resistance. The n-type added region is positioned at a specific location (outer side of terminal portion) with specific concentration gradient to achieve localized electric field control.
Solution Approach 2:
The invention changes the impurity concentration parameter by forming an n-type added region with higher impurity concentration than the drift region in the terminal portion. This parameter change (increasing impurity concentration in terminal portion) modifies the electric field distribution, suppressing depletion layer elongation and improving withstand-voltage keeping capability while maintaining low on-resistance through proper concentration gradient design.
3Loss of energy
If depletion layer elongation is allowed to reduce on-resistance, then on-resistance decreases, but the region subject to electric field application expands increasing defect likelihood
Solution Approach 1:
The invention applies local quality by forming an n-type added region with higher impurity concentration specifically in the terminal portion outer side, while maintaining lower concentration in the cell region between p-wells. This spatial differentiation of impurity concentration allows the terminal portion to suppress depletion layer elongation (improving withstand voltage) while the cell region maintains low on-resistance. The n-type added region is positioned at a specific location (outer side of terminal portion) with specific concentration gradient to achieve localized electric field control.
Solution Approach 2:
The invention changes the impurity concentration parameter by forming an n-type added region with higher impurity concentration than the drift region in the terminal portion. This parameter change (increasing impurity concentration in terminal portion) modifies the electric field distribution, suppressing depletion layer elongation and improving withstand-voltage keeping capability while maintaining low on-resistance through proper concentration gradient design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively lowers on-resistance, suppresses depletion layer elongation, enhances manufacturing yield, and improves reliability by reducing the likelihood of electric field application defects.
Implementation Method 1
a second conductivity-type electric field relaxation impurity region which is formed in a terminal portion of a formation region of the switching device and which relaxes an electric field of the terminal portion
Implementation Method 2
a first conductivity-type added region which is provided between second conductivity-type well regions of a plurality of unit cells that constitutes the switching device... and which has an impurity concentration higher than that in the silicon carbide semiconductor layer
Data Source
AI summary
The present invention relates to a power semiconductor device which includes: a first conductivity-type silicon carbide semiconductor layer; a switching device which is formed on the silicon carbide semiconductor layer; a second conductivity-type electric field relaxation impurity region which is formed in a terminal portion of a formation region of the switching device and which relaxes an electric field of the terminal portion; and a first conductivity-type added region which is provided between second conductivity-type well regions of a plurality of unit cells that constitutes the switching device, and at least on an outer side of the electric field relaxation impurity region, and which has an impurity concentration higher than that in the silicon carbide semiconductor layer.