SiC Termination Trenches for Breakdown Voltage and Etching Precision
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high breakdown voltage and processing accuracy due to variations in etching and shape irregularities in the termination structure region, which affect the performance and reliability of power semiconductor devices.
Innovation Solution
A semiconductor device design featuring a termination structure region with a trench structure and specific impurity concentration gradients, including a trench structure with decreasing interval distances from the active region, and the use of wide bandgap semiconductor materials like silicon carbide, which mitigates electric field concentration and prevents breakdown voltage decreases, while eliminating steps that compromise photolithography accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a termination structure region is formed by removing a portion of the epitaxial layer, then the device can be manufactured, but variations in etching and shape irregularities occur, reducing manufacturing precision
Solution Approach 1:
The termination structure region is divided into multiple segments: a first termination structure region with a first etched depth and a second termination structure region with a second etched depth. This segmentation allows different portions of the termination region to be processed at different depths, reducing etching variations and improving manufacturing precision while maintaining ease of manufacture.
Solution Approach 2:
Different etched depths are applied to different regions of the termination structure. The first termination structure region has a first etched depth while the second termination structure region has a second etched depth, creating local quality variations that optimize both manufacturing precision and ease of manufacture by addressing specific regional requirements.
2Ease of manufacture
If steps are present in the termination structure region, then the device structure can be formed, but photolithography accuracy decreases
Solution Approach 1:
The patent transitions from a two-dimensional planar termination structure to a three-dimensional stepped termination structure with multiple etched depths. This dimensional change allows the termination region to be processed more easily while the gradual depth transitions minimize the impact on photolithography accuracy by reducing abrupt step edges.
Solution Approach 2:
The patent introduces gradual depth transitions between different termination structure regions, creating curved or sloped interfaces rather than abrupt steps. This curvature approach reduces photolithography accuracy degradation while maintaining the ease of manufacture benefits from having a structured termination region.
3Manufacturing precision
If the termination structure region is etched to form a planar surface, then processing accuracy can be improved, but electric field concentration occurs, reducing breakdown voltage
Solution Approach 1:
Different etched depths are applied to different regions of the termination structure, creating local quality variations. The first termination structure region has a first etched depth while the second termination structure region has a second etched depth, which distributes the electric field more evenly and prevents concentration at a single planar surface, thereby improving breakdown voltage while maintaining processing accuracy.
Solution Approach 2:
The termination structure is segmented into multiple regions with different etched depths, creating a multi-level structure. This segmentation prevents electric field concentration by distributing the field across multiple depth levels, improving both processing accuracy and breakdown voltage simultaneously.
Data Source
AI summary
In a termination structure region, a first semiconductor layer of a first conductivity type, with an impurity concentration lower than that of a semiconductor substrate, is provided on the substrate of the first conductivity type. A second semiconductor layer of a second conductivity type is provided on a first side of the first semiconductor layer, opposite to a second side facing the substrate. Trenches penetrate the second semiconductor layer. At the first side in the first semiconductor layer, a first semiconductor region of the second conductivity type, with an impurity concentration higher than that of the second semiconductor layer, is provided at a side closer to an active region, contacting the second semiconductor layer. A second semiconductor region of the first conductivity type is provided in the second semiconductor layer, outside and adjacent to one of the trenches that is disposed at a farthest position from the active region.