SiC Trench Gate Structure for Threshold Voltage Aging Stability
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Solution Overview
Problem
SiC semiconductor devices experience aging degradation of gate threshold voltage due to long-term use, which is linked to the impurity concentration of the contact region.
Innovation Solution
The SiC semiconductor device incorporates a contact region with a second conductivity type impurity concentration of not more than 1.0×10^20 cm^-3, and includes first and second conductivity type impurities where the second conductivity type impurities are cancelled or compensated by the first conductivity type impurities, forming an Ohmic contact with the source region and a Schottky junction with the contact region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the contact region impurity concentration is increased to improve electrical conductivity, then the contact resistance decreases, but the aging characteristics of the gate threshold voltage deteriorate
Solution Approach 1:
The patent optimizes the second conductivity type impurity concentration parameter to be not more than 1.0×10^20 cm^-3, which is the critical threshold that simultaneously achieves low contact resistance and good aging characteristics. This parameter change resolves the contradiction by identifying the optimal concentration point that balances electrical performance and long-term stability.
Solution Approach 2:
The patent introduces first conductivity type impurities as an intermediary substance in the contact region. These impurities act as a mediator that compensates for the second conductivity type impurities, allowing the system to achieve low contact resistance without the harmful aging effects. The intermediary first conductivity type impurities enable the contact region to function properly while protecting against degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the aging degradation of the gate threshold voltage, improving the stability and performance of the SiC semiconductor device over time.
Implementation Method 1
portions of the second conductivity type impurities are cancelled/compensated for by the first conductivity type impurities
Implementation Method 2
form an Ohmic contact with the source region
Implementation Method 3
form a Schottky junction with the contact region
Data Source
AI summary
An SiC semiconductor device includes an SiC semiconductor layer having a first main surface and a second main surface, a gate electrode embedded in a trench with a gate insulating layer, a source region of a first conductivity type formed in a side of the trench in a surface laver portion of the first main surface, a body region of a second conductivity type formed in a region at the second main surface side with respect to the source region in the surface layer portion of the first main surface, a drift region of the first conductivity type formed in a region at the second main surface side in the SiC semiconductor layer, and a contact region of the second conductivity type having an impurity concentration of not more than 1.0×1020 cm−3 and formed in the surface layer portion of the first main surface.


