SiC Transistor Channel Counter-Doping for Higher Current
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Solution Overview
Problem
Silicon carbide transistors face challenges in increasing mobility and channel current while maintaining a low threshold voltage, as counter-doping techniques often lead to higher leakage currents and increased threshold voltage, requiring complex circuitry to compensate.
Innovation Solution
A silicon carbide transistor design with a p-doped region doped at concentrations greater than 1e18 cm^3 and pocket regions on either side of the channel, extending up to the gate oxide, to enhance mobility and channel current without significantly increasing the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If an n-type counter-doped region is formed in the channel to improve mobility, then mobility increases, but leakage current dramatically increases and threshold voltage increases
Solution Approach 1:
The patent applies local quality by creating a counter-doped region with specific n-type doping concentrated in a localized area beneath the gate oxide, rather than uniformly doping the entire channel. This localized approach improves mobility where needed while limiting the spread of leakage current to specific regions, thus resolving the contradiction between mobility enhancement and leakage control.
2Speed
If an n-type counter-doped region is formed in the channel to improve mobility, then mobility increases, but threshold voltage increases requiring additional compensation processes
Solution Approach 1:
The patent employs parameter changes by carefully controlling the doping concentration, depth, and lateral extent of the counter-doped region. By optimizing these parameters, the threshold voltage shift is minimized to acceptable levels, eliminating the need for additional compensation processes while still achieving the desired mobility improvement.
3Ease of operation
If p-doping concentration is increased to maintain low threshold voltage, then threshold voltage remains low, but mobility and channel current decrease
Solution Approach 1:
The patent applies asymmetry by creating an asymmetric doping profile with a counter-doped region that has different doping concentration and spatial distribution compared to the bulk p-doped channel. This asymmetric structure allows the threshold voltage to be controlled by the p-doping while mobility is enhanced by the localized n-type counter-doping, breaking the direct trade-off between these two parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a 70% increase in drive current with only a 3V increase in threshold voltage, reducing leakage current and power consumption, making it suitable for a wider range of applications.
Implementation Method 1
The channel region may include a p-doped silicon carbide region that is doped at a concentration greater than about 1e18 cm3. The channel region may also include a counter-doped region comprising n-doped silicon carbide
Implementation Method 2
The channel region may include a p-doped silicon carbide region that is doped at a concentration greater than about 1e18 cm3. The channel region may also include a counter-doped region comprising n-doped silicon carbide
Data Source
AI summary
A silicon carbide transistor may be formed with a channel that includes a p-doped region between n-doped source and drain regions. A counter-doped region may be formed at the top of the channel directly underneath the gate oxide. Instead of using the conventional doping levels for the p-doped region, the doping concentration may be increase to be greater than about 1e18 cm3. The transistor may also include pocket regions on one or both sides of the channel. The pocket regions may be formed in the counter-doped region and may extend up to the gate oxide. These improvements individually and/or in combination may increase the current in the channel of the transistor without significantly increasing the threshold voltage beyond acceptable operating limits.