SiC Trench MOSFET Corner Rounding via Selective Implant Etching
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Solution Overview
Problem
Current etch methods for SiC MOSFETs, such as sacrificial oxidation and hydrogen annealing, are impractical due to the formation of rounded corners and flat regions in trenches, which hinder scalability and contact/implantation efficiency, especially when using SiO2 as a mask.
Innovation Solution
An ion implantation process is used to increase the etch rate of a central portion of the SiC layer, followed by a dual-etch process to create a U-shape trench with a flat bottom, involving a masking layer, sidewall spacer, and selective ion implantation to form an implant region, which enhances etch rate and trench shaping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If hydrogen annealing is performed at high temperature (1700°C) to enable SiC MOSFET fabrication, then the annealing process can be completed, but the top corners of each trench become rounded which makes contact/implantation less scalable
Solution Approach 1:
The patent applies preliminary action by performing the etch process to create the trench structure before the hydrogen annealing step. By establishing the trench geometry first, the subsequent annealing process can be optimized to avoid corner rounding while still achieving the necessary material activation and defect repair. This sequencing ensures that the critical trench shape is formed before thermal processing that could deform it.
Solution Approach 2:
The patent employs parameter changes by modifying the annealing conditions specifically for SiC MOSFET fabrication. Instead of using standard high-temperature annealing that causes corner rounding, the process parameters (temperature, time, atmosphere) are adjusted and optimized to achieve the desired electrical properties without deforming the trench corner geometry, thus resolving the contradiction between completing annealing and maintaining sharp corners.
2Productivity
If conventional etch methods are used to create trenches in SiC, then the etching process can be completed, but rounded corners with flat regions are formed which hinder scalability and contact/implantation efficiency
Solution Approach 1:
The patent applies local quality by using selective ion implantation that targets specific regions of the SiC substrate. The implantation is localized to create precise trench structures with controlled corner sharpness. By concentrating the ion implantation effect in specific areas rather than uniformly across the substrate, the method achieves both complete etching and high shape precision at the trench corners, resolving the contradiction between etching completion and manufacturing precision.
3Reliability
If U-shape trench MOSFET structure is implemented to enable pitch scaling with high breakdown voltage, then breakdown voltage is improved, but the process becomes more complex and less scalable due to corner rounding issues
Solution Approach 1:
The patent replaces mechanical/thermal processes with ion implantation to achieve precise trench formation. Instead of relying on conventional etching and high-temperature annealing that cause corner rounding and process complexity, the ion implantation method provides direct control over trench geometry and material properties in a single integrated step. This substitution reduces fabrication complexity while maintaining the U-shape trench structure necessary for high breakdown voltage, thus resolving the contradiction between reliability improvement and device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively increases the etch rate and improves trench bottom shaping, enabling scalable U-shape SiC trench MOSFETs with enhanced breakdown voltage and on-current performance by reducing P-shielding doping concentration.
Implementation Method 1
forming an implant region within the SiC layer by directing ions through the opening defined by the sidewall spacer
Data Source
AI summary
Disclosed herein are approaches for forming a SiC MOSFET including at least one trench with rounded corners. In one approach, a method may include providing a masking layer over a silicon carbide (SiC) layer, wherein an opening is formed in the masking layer, and providing a sidewall spacer along a sidewall of the opening of the masking layer. The method may further include forming an implant region within the SiC layer by directing ions through the opening defined by the sidewall spacer, performing a first etch to the SiC layer, wherein the first etch forms a central recess and a set of shoulder regions adjacent the central recess, and performing a second etch to remove the set of shoulder regions.