SiC Trench Gate Structure With Dual Shielding Against Field Crowding

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Solution Overview

Problem

In silicon carbide power semiconductor devices, electric field crowding at the bottom of the trench gate leads to gate oxide deterioration and reduced reliability, as the breakdown voltage is determined by the trench gate rather than the P/N junction or edge termination region.

Innovation Solution

A dual shield structure is implemented at the bottom of the trench gate, featuring different-width gate trenches with a thicker gate oxide at the narrow region and a shield region at the corner areas, which mitigates field crowding and enhances breakdown voltage by forming a stepped edge and varying oxide thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a trench gate structure is used in SiC power semiconductor devices, then the device can achieve high switching speed and low conduction loss, but electric field crowding occurs at the bottom of the trench gate causing gate oxide deterioration and reduced reliability

Engineering Contradiction:
Improveswitching speedVSAvoidgate oxide reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The gate trench width is varied locally along its length, being narrower at the bottom and wider at the top. This local geometric variation creates corresponding variations in gate oxide thickness, providing enhanced field shielding at the critical bottom region where electric field crowding occurs, while maintaining standard dimensions at the top. This localized structural modification directly addresses the reliability issue without compromising the overall device performance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention transitions from a uniform cross-sectional gate trench to a tapered structure with varying width along the vertical dimension. This dimensional change creates a gradient in gate oxide thickness, with the thickest oxide at the bottom providing maximum field shielding. The dimensional variation allows the structure to better manage the electric field distribution in the vertical direction where crowding occurs

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Strength

If the gate trench is etched deeper into the drift layer, then the breakdown voltage can be increased, but electric field crowding at the bottom of the trench gate becomes more severe

Engineering Contradiction:
Improvebreakdown voltageVSAvoidelectric field crowding
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The gate trench width is varied locally along its length, being narrower at the bottom and wider at the top. This local geometric variation creates corresponding variations in gate oxide thickness, providing enhanced field shielding at the critical bottom region where electric field crowding occurs, while maintaining standard dimensions at the top. This localized structural modification directly addresses the reliability issue without compromising the overall device performance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The gate oxide thickness parameter is varied along the length of the gate trench, being thickest at the bottom and progressively thinner toward the top. This parameter variation allows the structure to provide maximum field shielding where the electric field is strongest (at the bottom), while reducing unnecessary oxide material at the top. The parameter change directly addresses the trade-off between breakdown voltage and field crowding

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230411511A1Power semiconductor device with dual shield structure in silicon carbide and manufacturing method thereof
Publication Date: 2023.12.21 TRINNO TECH
  • US20230411511A1 patent drawing
  • US20230411511A1 patent drawing
  • US20230411511A1 patent drawing

AI summary

Power semiconductor device with dual shield structure in silicon carbide and manufacturing method thereof disclosed. A silicon carbide power semiconductor device includes a substrate of a first conductivity type made of silicon carbide, a drift layer of the first conductivity type formed on an upper surface of the substrate with a relatively low impurity concentration compared to that of the substrate, a body region of a second conductivity type formed in an upper region of the drift layer, a different-widths gate trench, being etched to extend into the drift layer deeper than the body region, wherein an upper region of the different-widths gate trench is formed to be a wide-width region with a relatively wider width and a lower region of the different-widths gate trench is formed to be a narrow-width region with a relatively narrower width, wherein the wide-width region and the narrow-width region share a vertical center line so that the different-widths gate trench is formed in a boundary shape bent to have a stepped edge, a different-widths poly gate electrode filled in the different-widths gate trench so as to be insulated by a different-widths gate oxide and formed in a shape corresponding to the shape of the different-widths gate trench and a source region of the first conductivity type formed in an upper region of the body region in contact with sidewalls of the different-widths gate trench.