SiC Trench MOSFET Fabrication Using Selective Electrochemical Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor manufacturing methods, particularly for SiC trench MOSFETs, face challenges such as uneven trench sidewalls, carbon vacancies, and high surface roughness due to reactive ion etching (RIE), which affect device performance and reliability.
Innovation Solution
The method employs ion implantation and electrochemical etching (ECE) to form trenches in SiC semiconductor devices, avoiding RIE by using a HF-based solution and controlling etch rates with electric potential, resulting in smoother surfaces and reduced carbon vacancies, and allowing for precise definition of trench depth and shape.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If reactive ion etching (RIE) is used to form trenches in SiC, then trench formation speed is improved, but surface roughness increases and carbon vacancies are generated
Solution Approach 1:
The patent changes the fundamental etching parameters by switching from plasma-based RIE to electrochemical etching using HF-based solutions. This parameter change achieves smooth trench sidewalls with RMS roughness of 2-7 nm while eliminating carbon vacancies, resolving the contradiction between formation speed and surface quality
Solution Approach 2:
The patent replaces the plasma-based mechanical/chemical sputtering process with an electrochemical dissolution process. By applying electric potential to control the etching reaction, the method achieves precise trench formation with superior surface smoothness and no carbon vacancies, overcoming the limitations of RIE
2Productivity
If reactive ion etching (RIE) is used to form trenches in SiC, then trench formation speed is improved, but carbon vacancies are generated
Solution Approach 1:
The patent replaces plasma-based RIE with electrochemical etching using HF-based solutions. This substitution eliminates carbon vacancies entirely while maintaining efficient trench formation, resolving the contradiction between productivity and device reliability
Solution Approach 2:
By changing the etching chemistry from plasma to electrochemical dissolution, the patent achieves a parameter regime where carbon vacancies are completely avoided, ensuring high reliability without sacrificing formation speed
3Productivity
If reactive ion etching (RIE) is used to form trenches in SiC, then etching rate is improved, but unevenness on trench sidewalls and bottom face occurs
Solution Approach 1:
The patent replaces plasma-based RIE with electrochemical etching, substituting a process that causes uneven sidewalls and bottom face irregularities with one that produces uniform, smooth trenches. The electrochemical process achieves both high etching rates and excellent uniformity
Solution Approach 2:
By changing from plasma chemistry to electrochemical dissolution and controlling the electric potential, the patent achieves uniform trench profiles with smooth sidewalls and flat bottom faces, resolving the contradiction between etching rate and trench uniformity
4Manufacturing precision
If ion implantation and electrochemical etching are used to form trenches, then surface roughness is reduced, but additional processing steps are required
Solution Approach 1:
The patent applies ion implantation as a preliminary step to modify the electrical properties of the SiC surface, creating conductive regions that enable selective electrochemical etching. This preliminary action allows the subsequent etching step to achieve superior surface smoothness while maintaining process efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces surface roughness from 60-70 nm to 2-7 nm RMS, eliminates carbon vacancies, and enables faster trench formation with higher selectivity, improving the electrical properties and manufacturing efficiency of SiC trench devices.
Implementation Method 1
doping one or a plurality of first regions in the semiconductor body, the at least one first region is of a first conductivity type and starts from a surface
Implementation Method 2
forming a recess in the semiconductor body by selectively and wet-chemically etching the at least one first region
Data Source
Figure 1~4
Figure 5~9
Figure 10~14
AI summary
In at least one embodiment, the method is for producing a semiconductor device (1) and comprises: A) providing a semiconductor body (2) which is based on a group IV-semiconductor material, B) doping a first region (21) in the semiconductor body (2), the first region (21) is of a first conductivity type and starts from a surface (20) of the semiconductor body (2), and C) forming a recess (3) in the semiconductor body (2) by selectively and wet-chemically etching the first region (21).