SiC Trench Gate Device with Current Dispersion Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Silicon carbide (SiC) semiconductor devices with trench gate structures face challenges in reducing on-resistance while preventing breakdown of the gate insulating film, as high electric fields can lead to film destruction and narrow current paths due to depletion layers.
Innovation Solution
The SiC semiconductor device incorporates a trench gate structure with a first current dispersion layer of higher impurity concentration than the substrate, shallower first deep layers within this layer, and a second deep layer positioned apart from the trench, which inhibits high electric fields from reaching the gate insulating film and reduces on-resistance by extending the depletion layer further into the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the depletion layer is extended deeper into the substrate to reduce on-resistance, then on-resistance is reduced, but the electric field concentrates near the gate insulating film causing film breakdown
Solution Approach 1:
The patent changes the impurity concentration parameter by introducing a first current dispersion layer with higher impurity concentration than the drift layer. This modification alters the electric field distribution, allowing the depletion layer to extend deeper without concentrating excessive electric field near the gate insulating film, thus reducing on-resistance while preventing film breakdown
Solution Approach 2:
The patent segments the drift layer by introducing a first current dispersion layer with different impurity concentration characteristics. This segmentation creates distinct regions with different electric field distribution characteristics, enabling the depletion layer to extend deeper into the substrate while maintaining safe electric field levels near the gate insulating film
2Reliability
If shallow deep layers are formed to control electric field distribution, then gate insulating film breakdown is prevented, but on-resistance increases due to limited current path
Solution Approach 1:
The patent changes the impurity concentration parameter by creating a first current dispersion layer with higher impurity concentration than the drift layer. This parameter change allows shallow deep layers to effectively control electric field distribution and prevent gate insulating film breakdown while the higher impurity concentration region provides additional current conduction paths, thereby reducing on-resistance
Data Source
AI summary
A silicon carbide semiconductor device includes: a substrate; a first impurity region on the substrate; a base region on the first impurity region; a second impurity region in the base region; a trench gate structure including a gate insulation film and a gate electrode in a trench; a first electrode connected to the second impurity region and the base region; a second electrode on a rear surface of the substrate; a first current dispersion layer between the first impurity region and the base region; a plurality of first deep layers in the second current dispersion layer; a second current dispersion layer between the first current dispersion layer and the base region; and a second deep layer between the first current dispersion layer and the base region apart from the trench.