SiC Trench Gate Current Sensing Parasitic Diode Forward Voltage

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Solution Overview

Problem

Conventional semiconductor devices face challenges in achieving high-speed and large-current capabilities due to limitations in switching frequency and current density, particularly with silicon-based power MOSFETs and IGBTs, where the parasitic diode in the current sensing portion has a low forward voltage, leading to potential destruction from reverse recovery current.

Innovation Solution

A semiconductor device structure utilizing a wide bandgap material like silicon carbide (SiC) with a specific trench gate architecture, where the current sensing portion has a reduced p-type region density compared to the main semiconductor element, increasing the forward voltage of the parasitic diode and enhancing the reverse recovery resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the current sensing portion uses a conventional parasitic diode structure with standard p-type region density, then the device can be manufactured with standard processes, but the forward voltage is low leading to potential destruction from reverse recovery current

Engineering Contradiction:
Improvereverse recovery resistanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by creating a non-uniform p-type region density distribution in the current sensing portion. Specifically, the p-type base region has a lower impurity concentration in the current sensing portion compared to the main semiconductor element, while maintaining standard manufacturing processes. This localized modification increases the forward voltage of the parasitic diode in the current sensing portion, thereby improving reverse recovery resistance without requiring entirely new manufacturing techniques.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If silicon-based power MOSFETs are used to achieve high current density, then large current capability is obtained, but switching frequency is limited to several MHz

Engineering Contradiction:
Improvecurrent densityVSAvoidswitching frequency
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent applies parameter changes by modifying the impurity concentration parameter of the p-type base region in the current sensing portion. By reducing the impurity concentration from the standard level used in main semiconductor elements, the parasitic diode forward voltage is increased. This parameter modification allows the device to handle large currents while improving switching characteristics, addressing both current density and switching frequency requirements.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the p-type base region impurity concentration is increased to reduce positive hole current in the n-type drift region, then reverse recovery resistance improves, but the forward voltage of the parasitic diode decreases leading to potential destruction

Engineering Contradiction:
Improvereverse recovery resistanceVSAvoidforward voltage of parasitic diode
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent resolves this contradiction by applying local quality - differentiating the p-type base region impurity concentration between the current sensing portion and the main semiconductor element. The current sensing portion uses a lower impurity concentration to maintain high forward voltage and protect against destruction, while the main element uses standard concentration for optimal performance. This localized differentiation allows both requirements to be satisfied simultaneously.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11133300B2Semiconductor device
Publication Date: 2021.09.28 FUJI ELECTRIC CO LTD
  • US11133300B2 patent drawing
  • US11133300B2 patent drawing
  • US11133300B2 patent drawing

AI summary

A semiconductor device has first second-conductivity-type high-concentration regions, second second-conductivity-type high-concentration regions, third second-conductivity-type high-concentration regions, and fourth second-conductivity-type high-concentration regions. The first connecting regions each connect a portion of each of the first second-conductivity-type high-concentration regions and a portion of each of the second second-conductivity-type high-concentration regions. The second connecting regions each connect a portion of each of the third second-conductivity-type high-concentration regions and a portion of each of the fourth second-conductivity-type high-concentration regions. A ratio of a mathematical area of the first connecting regions to a mathematical area of the second second-conductivity-type high-concentration regions is greater than a ratio of a mathematical area of the second connecting regions to a mathematical area of the fourth second-conductivity-type high-concentration regions.