SiC Trench Gate Structure for Leakage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional silicon carbide (SiC) semiconductor devices with trench structures experience excess drain current due to differences in threshold values between the end and long sides of trenches, leading to leakage issues and reduced breakdown voltage.

Innovation Solution

The SiC semiconductor device design avoids forming the JFET structure at the end portion of the trench by preventing the n+ type source region formation there, and uses p-type layers to prevent high concentration junction leakage by ensuring the same conductivity type between the first and second gate regions, thereby maintaining breakdown voltage and reducing leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the trench is arranged in a strip shape with parallel trenches, then the device structure is simple and easy to manufacture, but excess drain current flows and ideal JFET characteristics cannot be obtained

Engineering Contradiction:
Improvetrench structure simplicityVSAvoiddrain current control
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The trench structure is segmented into different functional regions: a first depressed portion at the end portion extending deeper than the source region to eliminate the JFET structure, and a second depressed portion at the corner portion with the same depth as the source region. This segmentation allows different sections of the trench to serve different purposes, preventing excess drain current while maintaining manufacturing simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the trench are given different depths and structures tailored to their specific functions. The end portion has a deeper first depressed portion to prevent JFET formation, while the corner portion has a second depressed portion at source region depth to prevent leakage. This local differentiation solves the drain current control issue without requiring complete redesign of the entire trench structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If the first depressed portion is formed deeper than the source region to eliminate JFET structure, then excess drain current is restricted, but high concentration junction leakage occurs at the corner portion of the depressed portion

Engineering Contradiction:
Improvedrain current controlVSAvoidjunction leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The depressed portion is segmented into two distinct sections: the first depressed portion at the end portion extending deeper than the source region to prevent JFET formation, and the second depressed portion at the corner portion extending to the same depth as the source region. This segmentation prevents both excess drain current and corner leakage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different depths are assigned to different locations of the trench based on local requirements. The end portion requires greater depth to eliminate the JFET structure, while the corner portion uses moderate depth to prevent leakage without creating high concentration junctions. This localized approach resolves the contradiction between preventing drain current and avoiding junction leakage.

Inventive Principle:
Principle #3Local quality

3Object-generated harmful factors

If p-type layers are formed at the corner portion of the depressed portion, then junction leakage is prevented by ensuring same conductivity type, but device complexity increases

Engineering Contradiction:
Improvejunction leakage preventionVSAvoidlayer structure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The p-type layers are merged with the existing gate regions, forming a continuous p-type conductivity structure. The first gate region and second gate region both have p-type conductivity, creating a unified structure that prevents high concentration junction leakage while avoiding the need for separate additional layers. This integration reduces device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The p-type gate regions serve multiple functions: they provide the gate control function for the JFET and simultaneously prevent high concentration junction leakage by ensuring the same conductivity type at the corner portions. This multi-functionality eliminates the need for separate leakage prevention structures, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively restricts excess drain current and prevents high concentration junction leakage, ensuring stable operation and improved breakdown voltage by eliminating the formation of high concentration junctions at the trench ends.

Implementation Method 1

an n + type source region formed on the gate region by epitaxial growth or ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a channel layer of the first conductivity type formed on an inner wall of the trench by epitaxial growth

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentEP2750171B1Silicon carbide semiconductor device and method for manufacturing same
Publication Date: 2020.03.11 DENSO CORP
  • EP2750171B1 patent drawingFigure 1A~1D
  • EP2750171B1 patent drawingFigure 2A~2B
  • EP2750171B1 patent drawingFigure 3A~3F

AI summary

In a silicon carbide semiconductor device, a trench (6) penetrates a source region (4) and a first gate region (3) and reaches a drift layer (2). On an inner wall of the trench (6), a channel layer (7) of a first conductivity-type is formed by epitaxial growth. On the channel layer (7), a second gate region (8) of a second conductivity-type is formed. A first depressed portion (13) is formed at an end portion of the trench (6) to a position deeper than a thickness of the source region (4) so as to remove the source region (4) at the end portion of the trench (6). A corner portion of the first depressed portion (13) is covered by a second conductivity-type layer (16).