SiC Trench Transistor Gate Oxide Thickening at the Trench Bottom

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Solution Overview

Problem

Conventional trench type transistors face limitations due to high electric fields at the trench bottom, leading to reduced reliability and increased on-resistance, which existing solutions attempt to address through extra P-type dopants or thickening the oxide layer, but these methods complicate manufacturing and introduce additional effects.

Innovation Solution

A self-aligned ion implantation process forms a shielding implant layer at the trench bottom with a faster oxidation rate, creating a thicker gate oxide layer at the bottom than the sidewall, reducing the electric field and enhancing reliability without additional process steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional trench type transistors are used, then manufacturing is simpler, but high electric fields at the trench bottom reduce reliability and increase on-resistance

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a non-uniform gate oxide layer thickness distribution, where the oxide layer is thicker at the trench bottom than at the sidewalls. This localized structural variation reduces the electric field concentration at the trench bottom without requiring additional processing steps, thereby improving reliability while maintaining manufacturing simplicity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical parameters of the gate oxide layer by controlling oxidation conditions to achieve differential oxidation rates. The oxidation process is optimized so that the oxidation rate at the trench bottom exceeds that at the sidewalls, resulting in a thicker oxide layer at the bottom region. This parameter change directly reduces the electric field and improves device reliability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If extra P-type dopants are added to reduce electric field, then reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent converts the potentially harmful high electric field at the trench bottom into a beneficial effect by utilizing the self-aligned ion implantation process. The ion implantation naturally creates a shielding layer at the trench bottom, and the subsequent oxidation process exploits this location to grow a thicker oxide layer precisely where it is needed, transforming the electric field issue into a solution without adding process complexity

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements self-service through the self-aligned ion implantation process, where the ion implantation automatically positions the shielding layer at the trench bottom without requiring additional alignment steps. The oxidation process then naturally follows, creating the thicker oxide layer at the bottom region without external intervention, thereby simplifying manufacturing while improving reliability

Inventive Principle:
Principle #25Self-service

3Reliability

If ion implantation is performed vertically to the bottom surface, then shielding implant layer formation is effective, but oxidation rate uniformity becomes challenging

Engineering Contradiction:
Improveelectric field reductionVSAvoidoxidation rate control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating different oxidation rates at different locations within the gate trench. The oxidation process is controlled to produce a faster oxidation rate at the trench bottom compared to the sidewalls, resulting in a non-uniform gate oxide layer thickness distribution that is thicker at the bottom. This localized oxidation control achieves both effective shielding implant layer formation and the desired oxide thickness variation

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes oxidation parameters to achieve differential oxidation rates. By optimizing oxidation conditions, the process creates a scenario where the oxidation rate at the trench bottom exceeds that at the sidewalls. This parameter change enables the formation of a thicker gate oxide layer at the bottom region, effectively reducing the electric field while maintaining manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces the bottom electric field of the gate oxide layer, improving the reliability and reducing on-resistance of trench type transistors by using a self-aligned ion implantation process, which also simplifies manufacturing by eliminating the need for extra process steps.

Implementation Method 1

An ion implantation process is performed to the at least one gate trench to form a shielding implant layer at a bottom surface of the at least one gate trench

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

An oxidation process is performed to the at least one gate trench to form a gate oxide layer, wherein an oxidation rate at the bottom surface of the at least one gate trench is faster than an oxidation rate at a sidewall of the at least one gate trench

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 3

the method further includes performing an annealing process after removing the patterned mask. In some embodiments, the annealing process is performed in an inert gas environment at the temperature of about 1700 Celsius degrees for about 30 minutes

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS20240297250A1Method of manufacturing semiconductor device and semiconductor device
Publication Date: 2024.09.05 HON HAI PRECISION INDUSTRY CO LTD
  • US20240297250A1 patent drawing
  • US20240297250A1 patent drawing
  • US20240297250A1 patent drawing

AI summary

A method of manufacturing a semiconductor device includes providing a substrate, in which the substrate is SiC base. The substrate, from bottom to top, sequentially includes an N-type heavy doping base layer, an N-type light doping layer, a P-well region, and an N-type heavy doping layer. The substrate is etched by using a patterned mask to form a gate trench and a channel region defined by the gate trench. The channel region is shielded by the patterned mask. An ion implant is performed to the gate trench such that a shielding implant layer is formed on the bottom of the gate trench. An oxidation process is performed to the gate trench thereby forming a gate oxide layer. The oxidation rate at the bottom of the gate trench is faster than the oxidation rate at the sidewall of the gate trench. A semiconductor device is also provided.