SiC Trench JFET Gate Regrowth for Precise Sidewall Doping
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Solution Overview
Problem
Existing power semiconductor devices face challenges in achieving precise control of sidewall gate region dimensions and doping levels due to the limitations of angled ion implantation, particularly in narrow trench designs, which affect performance metrics such as specific on-resistance and blocking gain.
Innovation Solution
Employing epitaxially regrown layers to form gate regions and source layers, allowing for precise control of thickness and doping concentration, thereby eliminating the need for angled ion implantation and oxide masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If angled ion implantation is used to form gate regions in narrow trenches, then doping can be introduced, but precise control of sidewall gate region dimensions and doping levels is difficult to achieve
Solution Approach 1:
The patent replaces the mechanical/physical process of angled ion implantation with an epitaxial growth process. Instead of implanting ions at angles to deposit dopants on sidewalls, the invention uses epitaxial regrowth to directly form the doped gate regions on the trench sidewalls through controlled crystal growth, eliminating the complexity of angled implantation while achieving precise dimensional and doping control.
Solution Approach 2:
The patent changes the fundamental parameter of how doping is introduced - from post-growth ion implantation to in-situ doping during epitaxial growth. By controlling doping concentration and growth conditions during the epitaxial process, precise control of both dimensions and doping levels is achieved simultaneously, resolving the contradiction between manufacturing precision and ease of manufacture.
2Manufacturing precision
If oxide masks are used in the fabrication process, then pattern definition is achieved, but the process becomes more complex and requires additional steps
Solution Approach 1:
The patent extracts and eliminates the oxide mask step from the fabrication process. Instead of using oxide masks for pattern definition during ion implantation, the invention directly forms the gate regions through epitaxial growth on exposed sidewalls, removing the need for mask deposition, patterning, and removal steps while maintaining precise pattern definition.
Solution Approach 2:
The patent performs preliminary sidewall preparation and epitaxial growth in a single integrated process. By preparing the sidewall surface and immediately performing epitaxial growth with in-situ doping, the process eliminates subsequent masking and implantation steps, reducing overall process complexity while achieving precise pattern definition through controlled growth conditions.
3Reliability
If conventional fabrication processes are used, then existing manufacturing capabilities are maintained, but performance metrics such as specific on-resistance and blocking gain are affected
Solution Approach 1:
The patent replaces conventional ion implantation and masking processes with epitaxial growth, achieving superior control over gate region characteristics. This substitution enables precise control of both dimensional parameters and doping profiles, directly improving device performance metrics such as specific on-resistance and blocking gain while maintaining compatibility with existing semiconductor manufacturing capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the performance of vertical JFET devices by improving specific on-resistance and blocking gain, while maintaining precise control over gate region characteristics.
Implementation Method 1
employing epitaxially regrown layers to form gate regions and source layers
Data Source
AI summary
A silicon carbide semiconductor device includes a drift layer, a channel layer on the drift layer, the channel layer having a first conductivity type, a trench in the channel layer and a mesa adjacent to the trench, and a gate region within the trench. The gate region has a second conductivity type opposite the first conductivity type, and the gate region includes an epitaxially regrown layer. A method of forming a silicon carbide semiconductor device includes providing a drift layer, forming a channel layer on the drift layer, the channel layer having a first conductivity type, etching the channel layer to form a trench in the channel layer and a mesa adjacent to the trench, and epitaxially regrowing a gate region within the trench, wherein the gate region has a second conductivity type opposite the first conductivity type.


