SiC Trench Gate Device with Segmented Shield Layer
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Solution Overview
Problem
Silicon carbide semiconductor devices with trench gate structures face challenges in achieving high withstanding voltage due to electric field concentration at the trench bottom, leading to potential dielectric and avalanche breakdown, which limits their performance despite the superior insulation characteristics of SiC material.
Innovation Solution
A silicon carbide semiconductor device with a trench-bottom-surface protective layer comprising a high-concentration protective layer and a low-concentration protective layer, where the high-concentration layer has a higher impurity concentration and the low-concentration layer has a lower impurity concentration, is implemented to prevent dielectric breakdown and increase avalanche breakdown voltage, thereby enhancing the device's withstanding voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type electric field shield region is provided below the trench to prevent dielectric breakdown, then the gate oxide film is protected from electric field concentration, but avalanche breakdown occurs at the bottom surface of the shield region, limiting device withstanding voltage
Solution Approach 1:
The electric field shield region is divided into two distinct layers: a upper layer with higher impurity concentration to protect the gate oxide film, and a lower layer with lower impurity concentration to prevent avalanche breakdown. This segmentation allows each layer to fulfill different functional requirements simultaneously.
Solution Approach 2:
Different impurity concentrations are applied at different locations within the shield region. The upper portion has higher impurity concentration for gate oxide protection, while the lower portion has lower impurity concentration for avalanche breakdown prevention, creating local quality variations that address specific problems at each location.
2Reliability
If the impurity concentration in the electric field shield region is increased to prevent dielectric breakdown, then the gate oxide film is better protected, but the avalanche breakdown voltage decreases
Solution Approach 1:
The shield region is segmented into upper and lower layers with different impurity concentrations. The upper layer has higher impurity concentration for gate oxide protection, while the lower layer has lower impurity concentration to maintain high avalanche breakdown voltage.
Solution Approach 2:
Impurity concentration varies locally within the shield region: higher concentration at the upper portion near the gate oxide film for protection, and lower concentration at the lower portion to prevent avalanche breakdown, optimizing both functions simultaneously.
3Device complexity
If a single-layer electric field shield region is used, then the device structure is simpler, but it cannot simultaneously prevent dielectric breakdown and maintain high withstanding voltage
Solution Approach 1:
The shield region is divided into two functional layers with different impurity concentrations, allowing simultaneous achievement of gate oxide protection and high avalanche breakdown voltage, thereby improving device withstanding voltage despite increased structural complexity.
Solution Approach 2:
The shield region exhibits local quality variations with different impurity concentrations at different depths, enabling it to perform multiple functions: protecting the gate oxide film from electric field concentration while maintaining high avalanche breakdown voltage in the lower region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents dielectric breakdown at the trench bottom and increases the avalanche breakdown voltage, ensuring the device's withstanding voltage corresponds to the superior insulation characteristics of SiC, improving reliability and switching speed while reducing on-resistance and short circuit tolerance.
Implementation Method 1
a p-type electric field shield region is provided to shield an electric field from entering a gate oxide film from the n-type layer
Implementation Method 2
avalanche breakdown could be likely to occur due to a high electric field applied to a bottom surface of the electric field shield region
Data Source
AI summary
A drift layer of a first conductivity type is made of silicon carbide. A body region of a second conductivity type is provided on the drift layer. A source region of the first conductivity type is provided on the body region. A source electrode is connected to the source region. A gate insulating film is provided on side and bottom surfaces of a trench which penetrates the body region and the source region. A gate electrode is provided in the trench with the gate insulating film interposed therebetween. A trench-bottom-surface protective layer of the second conductivity type provided below the bottom surface of the trench in the drift layer is electrically connected to the source electrode. The trench-bottom-surface protective layer has a high-concentration protective layer, and a first low-concentration protective layer provided below the high-concentration protective layer and having an impurity concentration lower than that of the high-concentration protective layer.