SiC Trench Gate Insulating Film Thickness Mitigation

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Solution Overview

Problem

Conventional semiconductor devices with trench structures face challenges in reducing ON resistance and maintaining high breakdown voltage, particularly when using wide bandgap semiconductor materials like silicon carbide, due to high electric field stress on gate insulating films and limited pn junction formation techniques.

Innovation Solution

A semiconductor device design featuring a wide bandgap semiconductor substrate with specific conductivity type layers and regions, including p-type base regions and trenches, where the second p+-type base region is wider than the trench, and the pn junction is formed deeper than the trench bottom, mitigating electric field stress and improving breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a trench structure is formed with gate insulating film covering the inner wall entirely to form orthogonal channel, then cell density per unit area is increased, but the gate insulating film at the bottom of the trench is subjected to high electric field which reduces reliability

Engineering Contradiction:
Improvecell density per unit areaVSAvoidgate insulating film reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The gate insulating film thickness is varied locally: a first thickness in the main trench region and a second thickness (greater than the first) at the bottom portion of the trench. This local quality change protects the vulnerable bottom region while maintaining the space-efficient trench structure for high cell density.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thickness parameter of the gate insulating film is changed from uniform to non-uniform, with the bottom portion having a greater thickness than the main body. This parameter change directly addresses the high electric field stress at the trench bottom while preserving the orthogonal channel structure's productivity benefits.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If p-type region is formed to reach deeper than trench bottom to form pn junction for mitigating electric field, then breakdown voltage is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the electric field mitigation function from the complex deep p-type region structure and implements it through the simplified approach of increasing gate insulating film thickness only at the trench bottom. This takes out the unnecessary structural complexity while retaining the breakdown voltage improvement.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of extending the p-type region deeper to mitigate electric field (conventional approach), this patent inverts the approach by thickening the gate insulating film at the trench bottom. This alternative method achieves the same electric field mitigation effect with simpler manufacturing.

Inventive Principle:
Principle #13The other way round (Inversion)

3Ease of manufacture

If gate insulating film at trench bottom is made thinner to reduce processing steps, then manufacturing is simplified, but electric field strength increases and reliability decreases

Engineering Contradiction:
Improveprocessing simplicityVSAvoidgate insulating film strength
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The gate insulating film is formed with different local qualities: standard thickness in the main trench region for ease of manufacture, and increased thickness at the bottom portion for reliability. This local differentiation resolves the contradiction between manufacturing simplicity and device reliability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10403749B2Method of manufacturing semiconductor device
Publication Date: 2019.09.03 FUJI ELECTRIC CO LTD
  • US10403749B2 patent drawing
  • US10403749B2 patent drawing
  • US10403749B2 patent drawing

AI summary

In a first main surface side of a silicon carbide semiconductor base, a trench is formed. A second base region of a second conductivity type is arranged at a position facing the trench in a depth direction. An end (toward a drain electrode) of the second base region of the second conductivity type, and an end (toward the drain electrode) of a first base region of the second conductivity type reach a position deeper than an end (toward the drain electrode) of a region of a first conductivity type. Thus, the electric field at a gate insulating film at the trench bottom is mitigated, suppressing the breakdown voltage of the active region and enabling breakdown voltage design of the edge termination region to be facilitated. Further, such a semiconductor device may be formed by an easy method of manufacturing.