SiC Trench MOS Transistor Gate Depth Optimization
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Solution Overview
Problem
Transistor devices using silicon carbide face issues with insufficient turn-on current and decreasing electric field strength at the gate oxide layer, leading to breakdown and reliability concerns.
Innovation Solution
A trench metal oxide semiconductor transistor device is designed with a substrate, drift region, deep trench doped region, epitaxial region, trench gate, and gate insulating layer, where the trench gate passes through the epitaxial region, and the distance between the trench gate and deep trench doped region is optimized to 0.5–3 μm, dispersing the electric field and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the trench gate is positioned closer to the deep trench doped region to reduce device complexity, then the manufacturing process is simplified, but the electric field concentration at the gate bottom and corner increases leading to device breakdown
Solution Approach 1:
The patent applies parameter changes by optimizing the distance parameter between the trench gate and deep trench doped region to a specific range (0.5-3 μm). This quantitative parameter adjustment resolves the contradiction by finding the optimal balance point where the gate is close enough to simplify device structure but far enough to prevent electric field concentration and ensure device reliability.
2Device complexity
If the distance between the trench gate and deep trench doped region is reduced to simplify device structure, then manufacturing becomes easier, but turn-on current becomes insufficient
Solution Approach 1:
The patent uses parameter changes by establishing an optimal distance range (0.5-3 μm) between the trench gate and deep trench doped region. This parameter optimization ensures sufficient turn-on current while maintaining simplified device structure, resolving the contradiction between structural simplicity and electrical performance.
3Reliability
If the distance between the trench gate and deep trench doped region is increased to improve breakdown voltage, then electric field is better dispersed, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by defining an optimal distance range (0.5-3 μm) that balances breakdown voltage improvement with device structure simplicity. This quantitative approach resolves the contradiction by identifying the point where further distance increase would unnecessarily complicate the device without providing proportional reliability benefits.
Data Source
AI summary
A trench metal oxide semiconductor transistor device and a manufacturing method thereof are described. The trench metal oxide semiconductor transistor device includes a substrate of a first conductivity type, a drift region of the first conductivity type, a deep trench doped region of a second conductivity type, an epitaxial region of the second conductivity type, a trench gate, a gate insulating layer, a source region, a drain electrode and a source electrode. The drift region has at least one deep trench therein, and the deep trench doped region is disposed in the deep trench. The trench gate passes through the epitaxial region, and a distance between a bottom of the trench gate and a bottom of the deep trench doped region is 0.5˜3 μm.