SiC Trench MOSFET Current Path Management
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Solution Overview
Problem
Trench gate type MOSFETs face high ON resistance due to residual JFET resistance, which can lead to reliability issues, particularly at current concentration points, despite efforts to diffuse current paths and relax electric fields.
Innovation Solution
A silicon carbide semiconductor device design incorporating a high-concentration layer and a current restriction layer with specific impurity concentrations to diffuse and restrict current paths in different cell regions, reducing ON resistance while enhancing reliability by managing current distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a trench gate type structure is used to avoid JFET region formation, then ON resistance is reduced, but electric field concentrates on the trench bottom surface causing reliability issues with the gate insulating film
Solution Approach 1:
The patent introduces a p-type trench bottom surface protective layer specifically at the trench bottom surface where electric field concentration occurs. This local modification provides electric field relaxation precisely where needed without affecting other regions, thereby protecting the gate insulating film while maintaining the low ON resistance benefit of the trench gate structure.
Solution Approach 2:
The p-type trench bottom surface protective layer acts as an intermediary between the n-type drift layer and the gate insulating film. It mediates the electric field distribution by providing a region with different conductivity type that relaxes the electric field, preventing direct high field stress on the gate insulating film while allowing the trench gate structure to function effectively.
2Reliability
If a p-type trench bottom surface protective layer is added for electric field relaxation, then gate insulating film reliability is improved, but current path is narrowed increasing JFET resistance
Solution Approach 1:
The patent introduces an n-type current diffusion layer specifically in the region between the p-type body region and n-type drift layer, away from the trench bottom surface. This local modification provides current diffusion precisely where needed to compensate for the current path narrowing caused by the p-type protective layer, thereby reducing JFET resistance while maintaining the protective function.
3Loss of energy
If current diffusion structures are added to reduce ON resistance, then ON resistance is reduced, but current concentration points may cause reliability issues
Solution Approach 1:
The patent introduces a p-type current restriction layer specifically in cell regions identified as having current concentration points. This local modification restricts current flow precisely where concentration occurs, preventing reliability issues at these specific locations while allowing current diffusion structures to function in other regions to maintain low ON resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device effectively reduces ON resistance and improves reliability by diffusing current paths in one region and restricting them in another, thereby mitigating current concentration-related reliability issues.
Implementation Method 1
The high-concentration layer is provided between the drift layer and the body region in a first cell region and has the first conductivity type and a second impurity concentration higher than the first impurity concentration. The current restriction layer is provided between the drift layer and the body region in a second cell region and has the first conductivity type and a third impurity concentration higher than the first impurity concentration and lower than the second impurity concentration.
Data Source
AI summary
A gate insulating film covers a trench penetrating through a source region and a body region and reaching a drift layer in each of a first cell region and a second cell region. The gate electrode is provided in the trench. A high-concentration layer of the first conductivity type is provided between the drift layer and the body region in the first cell region and has a second impurity concentration higher than the first impurity concentration. A current restriction layer is provided between the drift layer and the body region in the second cell region and has the first conductivity type and a third impurity concentration higher than the first impurity concentration and lower than the second impurity concentration.