SiC Trench MOSFET Sidewall Off-Angle for Field Relief
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Solution Overview
Problem
Trench MOSFETs using silicon carbide experience increased on-resistance due to decreased channel density, which is more pronounced than in silicon-based devices, necessitating a solution to relieve electric field stress on the gate insulating film and minimize on-resistance.
Innovation Solution
An insulated gate silicon carbide semiconductor device with a protective diffusion layer at the trench bottom and a second base region on trench sidewalls with an off-angle greater than 0°, which connects to the first base region, is used to relieve electric field stress and suppress on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective diffusion layer is formed on the bottom of the trench to relieve electric field stress, then the gate insulating film is protected from breakdown, but the channel density decreases and on-resistance increases
Solution Approach 1:
The patent applies local quality by forming the protective diffusion layer only on the bottom surface of the trench rather than on all surfaces. This selective placement allows the bottom to have different electrical properties (higher doping concentration for field relief) while preserving the channel-forming properties on the sidewalls, thus resolving the contradiction between protecting the gate insulating film and maintaining channel density
Solution Approach 2:
The patent segments the trench into different functional zones: the bottom surface for electric field relief and the sidewalls for channel formation. By dividing the trench structure into these distinct regions with different doping characteristics, the patent simultaneously achieves gate insulating film protection and maintains adequate channel density for low on-resistance
2Reliability
If the second base region is formed in contact with the trench sidewall surface, then the potential is fixed and electric field stress is relieved, but the MOS characteristics deteriorate and channel function is reduced
Solution Approach 1:
The patent applies local quality by restricting the second base region to contact only with the bottom surface of the trench and avoiding contact with the sidewall surfaces where channels form. This localized doping creates a potential well for field relief without interfering with the MOS channel characteristics on the sidewalls, thus resolving the contradiction between potential stability and on-resistance
Solution Approach 2:
The patent extracts the protective function from the sidewall region and concentrates it on the bottom surface through the second base region. By removing the need for sidewall contact, the patent preserves the channel-forming MOS characteristics while still achieving potential fixation and electric field relief through the bottom-contacted second base region
Data Source
AI summary
An insulated gate silicon carbide semiconductor device includes: a drift layer of a first conductivity type on a silicon carbide substrate of 4H type with a {0001} plane having an off-angle of more than 0° as a main surface; a first base region; a source region; a trench; a gate insulating film; a protective diffusion layer; and a second base region. The trench sidewall surface in contact with the second base region is a surface having a trench off-angle of more than 0° in a <0001> direction with respect to a plane parallel to the <0001> direction. The insulated gate silicon carbide semiconductor device can relieve an electric field of a gate insulating film and suppress an increase in on-resistance and provide a method for manufacturing the same.