SiC Trench Gate MOSFET Cell Pitch Reduction via Segmented P-Base
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Solution Overview
Problem
Conventional silicon carbide trench gate MOSFETs face challenges in reducing ON resistance while maintaining a predetermined breakdown voltage due to limitations in cell pitch and element area, primarily because of the fixed structure and process limitations in semiconductor manufacturing.
Innovation Solution
The silicon carbide semiconductor device incorporates a novel structure with a first p+-type region covering the trench bottom and a second p+-type region contacting the p-type base region between trenches, allowing for a reduced cell pitch by selectively arranging the second p+-type region and optimizing the layout to minimize ON resistance without compromising breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional trench gate structure is used with fixed cell pitch, then the breakdown voltage is maintained, but the ON resistance and element area cannot be reduced further
Solution Approach 1:
The invention segments the p-type base region into two distinct parts: a first p-type region at the trench bottom and a second p-type region at the mesa portion between trenches. This segmentation allows independent optimization of each region's function, enabling reduced cell pitch while maintaining breakdown voltage characteristics.
Solution Approach 2:
The invention applies different doping concentrations and geometries to different locations: the first p-type region at the trench bottom has specific characteristics for breakdown voltage control, while the second p-type region at the mesa has optimized characteristics for reducing ON resistance. This local quality differentiation resolves the contradiction between reliability and productivity.
2Productivity
If the cell pitch is reduced to lower ON resistance, then the element area decreases, but the breakdown voltage cannot be secured
Solution Approach 1:
The invention utilizes the vertical dimension by forming the first p-type region at the trench bottom (deep structure) and the second p-type region at the mesa portion (surface structure). This three-dimensional arrangement allows reduced horizontal cell pitch while maintaining vertical electric field control for breakdown voltage.
3Reliability
If a p+-type region extends to contact the sidewall of the trench, then the breakdown voltage is improved, but the manufacturing complexity increases
Solution Approach 1:
The invention segments the p-type base region formation into two separate process stages: first forming the first p-type region at the trench bottom, then forming the second p-type region at the mesa portion. This segmentation simplifies manufacturing compared to forming a continuous p+-type region extending to the sidewall.
Data Source
AI summary
A silicon carbide semiconductor device, including a silicon carbide substrate, multiple trenches provided in the silicon carbide substrate, a first semiconductor region provided between each adjacent two of the trenches, a second semiconductor region selectively provided in the first semiconductor region, multiple third semiconductor regions selectively provided in the silicon carbide substrate to each cover a bottom of one trench, multiple fourth semiconductor regions selectively provided in the silicon carbide substrate, each between adjacent two of the trenches and being in contact with the first semiconductor region, multiple gate electrodes, each provided via a gate insulating film in one of the trenches, a first electrode connected to the first and second semiconductor regions, and a second electrode connected to the rear surface of the silicon carbide substrate. At least two of the trenches are arranged between each adjacent two of the fourth semiconductor regions.