SiC Trench MOSFET Source Structure for Stable Threshold Voltage
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Solution Overview
Problem
Conventional silicon carbide semiconductor devices with trench gate structures face issues due to variations in p-type base layer thickness and n-type impurity concentration, leading to fluctuations in threshold voltage and increased ON resistance.
Innovation Solution
A silicon carbide semiconductor device structure is developed where the n-type source region is formed by epitaxial growth and the n+-type source regions are formed by ion implantation, with a p-type base layer of controlled thickness and impurity concentration, reducing damage and variations in impurity concentration, and employing a current spreading layer to minimize channel resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the p-type base layer is formed by epitaxial growth to increase channel density, then the channel length can be controlled, but the thickness variation exceeds 10% leading to threshold voltage fluctuation
Solution Approach 1:
The patent changes the formation method parameter of the p-type base layer from epitaxial growth to ion implantation. Ion implantation provides precise control over implantation depth and concentration, reducing thickness variation to less than 5% and thereby stabilizing the threshold voltage of the semiconductor device.
Solution Approach 2:
The patent replaces the chemical epitaxial growth process with a physical ion implantation process. This substitution allows for more precise control of layer thickness and impurity concentration, directly addressing the thickness variation problem while maintaining the desired channel density.
2Reliability
If the n-type source region is formed by epitaxial growth with high impurity concentration, then the ON resistance can be reduced, but the impurity concentration variation increases leading to manufacturing difficulty
Solution Approach 1:
The patent replaces epitaxial growth with ion implantation for forming the n-type source region. Ion implantation enables precise control of impurity concentration and depth distribution, reducing variation while achieving the required high concentration for low ON resistance.
Solution Approach 2:
The patent changes the formation method parameter from epitaxial growth to ion implantation, which provides superior control over impurity concentration. This allows achieving high concentration (at least 5×10^18/cm³) with minimal variation, thereby reducing ON resistance while improving manufacturing precision.
3Reliability
If the p-type base layer is made thin to reduce channel length variation, then the threshold voltage stability improves, but the manufacturing process becomes more difficult to control
Solution Approach 1:
The patent replaces epitaxial growth with ion implantation for forming the p-type base layer. Ion implantation is easier to control for thin layers as it allows precise control of implantation depth and dose, achieving thin layer formation with high precision and improved ease of manufacture.
Solution Approach 2:
The patent changes the formation method to ion implantation, which provides better control over thin layer thickness and impurity concentration. This enables achieving thin p-type base layer with reduced thickness variation while simplifying the manufacturing control process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses variation in threshold voltage and ON resistance, enhancing the reliability and performance of silicon carbide semiconductor devices by reducing impurity concentration variations and maintaining low channel length variability.
Implementation Method 1
the p-type base layer 106 is ion-implanted with an n-type impurity and inverted, whereby portions of the p-type base layer 106 is inverted to an n-type, thereby forming the n+-type source regions 108
Implementation Method 2
n-type source regions 107 are formed thereon by n-type epitaxial growth of a low impurity concentration (about 1×10^17/cm³)
Data Source
AI summary
A silicon carbide semiconductor device includes, on a front surface of a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, a first semiconductor region of the first conductivity type selectively provided on a first side of the third semiconductor layer opposite to a second side thereof facing the silicon carbide semiconductor substrate, second semiconductor regions of the second conductivity type that have an impurity concentration higher than that of the second semiconductor layer, trenches, gate electrodes provided via gate insulating films, an interlayer insulating film, a first electrode, and a second electrode. The first semiconductor region is thinner than a portion of the third semiconductor layer between the first semiconductor region and the second semiconductor layer.