SiC Trench Transistor Shielding Layout for Breakdown Voltage
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Solution Overview
Problem
Current semiconductor transistors with gate electrodes in trenches on silicon carbide substrates face challenges in optimizing characteristics such as electric field distribution, breakdown voltage, and contact resistance, particularly in achieving reliable operation and efficient current pathing.
Innovation Solution
The semiconductor device design includes a transistor with a gate electrode in trenches forming ridges between neighboring trenches, featuring a source region, channel region, current-spreading region, and shielding region of specific conductivity types, along with a body contact portion and superjunction structure, which enhances voltage robustness and reduces contact resistance through optimized doping and ion implantation processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate trenches are formed in silicon carbide substrate to create ridges for channel regions, then channel density and voltage robustness are improved, but manufacturing complexity and doping precision requirements increase
Solution Approach 1:
The device is divided into multiple transistor cells with gate trenches separating them, creating distinct ridges for channel regions. This segmentation increases channel density while maintaining voltage robustness through the insulating effect of the trenches
Solution Approach 2:
Different regions are doped with specific conductivity types (first conductivity type in ridges, second conductivity type in trenches and contact regions) to optimize local electrical properties. This allows simultaneous achievement of high channel density and voltage robustness through localized doping strategies
2Reliability
If shielding regions are added below gate trenches to manage electric fields, then breakdown voltage and reliability are improved, but manufacturing steps and process complexity increase
Solution Approach 1:
Shielding regions of the second conductivity type are formed below the gate trenches before final device operation. This preliminary structuring of electric fields through pre-formed shielding regions enhances breakdown voltage and prevents parasitic turn-on without requiring complex real-time control mechanisms
3Reliability
If ion implantation processes are used to form shielding regions with specific conductivity types, then electric field management and voltage robustness are improved, but manufacturing precision and process control requirements increase
Solution Approach 1:
Ion implantation processes are used to introduce dopants with specific conductivity types into designated regions. By controlling implantation parameters (energy, dose, angle), the patent achieves precise doping profiles that manage electric fields effectively while maintaining manufacturability through well-established semiconductor processing techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves voltage robustness, reduces contact resistance, and increases channel density, leading to enhanced reliability and performance by managing electric fields and parasitic turn-on effects, while allowing for larger doping concentrations and reduced switching losses.
Implementation Method 1
a first portion of the shielding region being arranged below the gate trenches, respectively, and a second portion of the shielding region being arranged adjacent to a sidewall of the gate trenches
Implementation Method 2
forming a shielding region of a second conductivity type
Data Source
AI summary
A semiconductor device includes a transistor including transistor cells. Each transistor cells has a gate electrode arranged in gate trenches formed in a first portion of a silicon carbide substrate and extending in a first horizontal direction, a source region, a channel region, and a current-spreading region. The source region, channel region, and at least part of the current-spreading region are arranged in ridges patterned by the gate trenches. The transistor cells further include a body contact portion of the second conductivity type arranged in a second portion of the silicon carbide substrate and electrically connected to the channel region. The transistor cells further include a shielding region of the second conductivity type. A first portion of the shielding region is arranged below the gate trenches, respectively, and a second portion of the shielding region is arranged adjacent to a sidewall of the gate trenches, respectively.