Low-Temperature SiC Via Reinforcement for MEMS-CMOS Integration
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Solution Overview
Problem
Current chip-level packaging (CLP) methods for MEMS devices are costly, time-consuming, and prone to damaging fragile devices during processing, while wafer-level packaging (WLP) offers advantages like batch encapsulation and improved yield but requires low temperature processing to be compatible with CMOS electronics and SiC materials.
Innovation Solution
A method involving low temperature ceramic materials for wafer-level packaging of MEMS devices, using DC magnetron sputtering for SiC deposition at room temperature, and ceramic reinforcement of through-wafer feed-throughs to enhance mechanical integrity and hermeticity, allowing for efficient integration with CMOS electronics and reduced processing temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chip-level packaging (CLP) is used for MEMS devices, then device protection and hermetic sealing are improved, but processing cost increases, processing time increases, and risk of device damage increases
Solution Approach 1:
The patent merges multiple packaging operations into a single wafer-level processing step. Instead of individually packaging each chip (CLP), the entire wafer is packaged simultaneously using a glass lid that seals over multiple device sites, achieving hermetic protection for all devices in one batch operation. This eliminates the need for separate dicing, individual chip mounting, and separate sealing steps for each chip.
Solution Approach 2:
The glass lid structure serves multiple functions simultaneously: it provides hermetic sealing, mechanical protection, and defines vacuum chambers for multiple devices. The single packaging structure universally protects all MEMS devices on the wafer, replacing the need for individual packaging components for each chip.
2Productivity
If wafer-level packaging (WLP) is used for MEMS devices, then processing cost decreases and productivity increases, but device mechanical integrity may be compromised without proper reinforcement
Solution Approach 1:
The patent uses a composite structure combining silicon wafer, ceramic feed-throughs, and glass lid materials. The ceramic material is specifically chosen for its mechanical strength and ability to reinforce the wafer structure. This composite approach maintains device mechanical integrity while enabling batch processing of multiple devices.
Solution Approach 2:
The patent applies localized reinforcement at critical points where devices require mechanical support. Ceramic feed-throughs are strategically positioned to provide local structural strengthening without requiring reinforcement of the entire wafer, thus maintaining overall mechanical integrity while enabling batch packaging.
3Strength
If traditional high temperature processing is used for WLP, then material properties and bonding strength are improved, but compatibility with CMOS electronics and SiC materials is lost
Solution Approach 1:
The patent changes the processing temperature parameter from traditional high temperatures (above 400°C) to low temperatures (below 400°C, preferably 200-350°C). This parameter change enables compatibility with CMOS electronics and SiC materials that cannot withstand high temperatures, while still achieving sufficient bonding strength through optimized low-temperature bonding processes and surface preparation techniques.
Solution Approach 2:
The patent introduces intermediary layers and surface treatments that enable bonding at low temperatures. These intermediaries facilitate adhesion between the glass lid and silicon wafer without requiring high temperature, allowing CMOS-compatible processing while maintaining bonding integrity.
4Reliability
If ceramic feed-throughs are used in WLP, then hermeticity and mechanical strength are improved, but processing complexity increases
Solution Approach 1:
The patent performs preliminary preparation of ceramic feed-through structures before final bonding. Through-holes are pre-drilled and pre-filled with ceramic material in the silicon wafer before attaching the glass lid. This preliminary action simplifies the overall process by preparing all ceramic components in advance, reducing the complexity of the bonding step itself.
Solution Approach 2:
The patent segments the packaging process into distinct modular steps: ceramic feed-through preparation, wafer bonding, and lid attachment. Each step can be independently optimized and controlled, reducing overall processing complexity despite the introduction of ceramic materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables cost-effective, high-yield wafer-level packaging of MEMS devices with improved mechanical and electrical performance, compatible with CMOS electronics, and suitable for low-pressure or vacuum environments, while minimizing processing temperature constraints.
Implementation Method 1
using DC magnetron sputtering for SiC deposition at room temperature
Data Source
AI summary
It would be beneficial to integrate MEMS devices with silicon CMOS electronics, package them in controlled environments, e.g. vacuum for MEMS resonators, and provide industry standard electrical interconnections such as solder bumps. However, to do so requires through-wafer via-based electrical interconnections. However, the fragile nature of the MEMS devices, the requirement for vacuum, hermetic sealing, and the stresses placed on metallization membranes are not present in conventional CMOS packaging. Accordingly there is provided a means of reinforcing through-wafer vias for integrated MEMS-CMOS circuits by in-filling the through-wafer electrical vias with low temperature deposited ceramic materials deposited with processes compatible with post-processing of CMOS electronics. Beneficially ceramics such as silicon carbide provide enhanced mechanical strength, enhanced expansion matching, and increased thermal conductivity in comparison to silicon and solder materials. The ceramic reinforcing may be further adapted to include micro-channels for the provisioning of liquid cooling through the structures.