SiC Wafer Layer Structure to Suppress Chromium Contamination
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Solution Overview
Problem
The contamination of semiconductor devices during manufacturing due to chromium (Cr) adhering to manufacturing apparatuses and being incorporated into the devices, which hinders the achievement of stable characteristics.
Innovation Solution
A wafer design featuring a substrate with a low Cr concentration and a first layer containing Cr, positioned such that the first layer is not at the outer edge of the substrate, thereby minimizing contamination during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Cr-containing layer is used to improve manufacturing process stability, then adhesion and processing stability are improved, but chromium contamination of semiconductor devices occurs
Solution Approach 1:
The wafer is divided into a Cr-containing first layer and a Cr-free second layer. The first layer provides Cr for manufacturing process stability, while the second layer protects the semiconductor device from Cr contamination. This segmentation allows each layer to serve its specific function without interfering with the other.
Solution Approach 2:
The harmful Cr element is extracted and confined to the first layer, separating it from the device formation region in the second layer. This extraction ensures that Cr remains available for process stability while being prevented from contaminating the semiconductor device.
2Reliability
If the Cr-containing layer extends to the outer edge of the substrate, then manufacturing stability is maintained, but contamination risk increases
Solution Approach 1:
The Cr distribution is made non-uniform across the wafer. The first layer contains Cr in its entirety, while the second layer is completely Cr-free. This local quality differentiation ensures that Cr is present where needed for process stability but absent from regions where it would cause contamination.
Solution Approach 2:
The solution transitions from a uniform Cr distribution to a layered vertical distribution. By stacking layers with different Cr concentrations, the patent controls Cr presence in the vertical dimension while maintaining horizontal coverage where needed.
Data Source
AI summary
According to one embodiment, a wafer includes a substrate including SiC, and a first layer including SiC. The first layer is in contact with the substrate. The first layer includes Cr. The substrate does not include Cr. Or a concentration of Cr in the substrate is lower than a concentration of Cr in the first layer. A substrate length of the substrate in a second direction crossing a first direction from the substrate to the first layer is longer than a first layer length of the first layer in the second direction.