Silicon Carbide Epitaxial Wafer Defect Control
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Solution Overview
Problem
The existing silicon carbide epitaxial wafers often have diagonal line defects that can lead to increased resistance and reduced reliability of semiconductor devices due to the presence of screw dislocation pits and diagonal line defects, which are difficult to eliminate completely.
Innovation Solution
A silicon carbide epitaxial wafer with a single crystal substrate of 4H polytype having a major surface inclined at an angle θ to the {0001} plane, where the diameter is greater than or equal to 150 mm, and the angle θ is between 0° and 6°, featuring pairs of screw dislocation pits and diagonal line defects at a distance t/tan θ, with a density of less than or equal to 2 pairs/cm², reducing the occurrence of diagonal line defects and enhancing semiconductor device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon carbide epitaxial wafer is produced with conventional methods, then the production process is simple, but diagonal line defects and screw dislocation pits occur frequently, reducing device reliability
Solution Approach 1:
The patent applies parameter changes by precisely controlling the off-angle θ (0° < θ ≤ 6°) of the substrate surface relative to the {0001} plane and controlling the epitaxial layer thickness t. These parameter optimizations reduce the occurrence of diagonal line defects and screw dislocation pits, improving device reliability without requiring fundamentally new production methods
Solution Approach 2:
The patent implements preliminary action by pre-configuring the substrate with a specific off-angle orientation before epitaxial growth. This preliminary structural preparation prevents the formation of harmful defects during the subsequent growth process, rather than attempting to correct defects after they form
2Reliability
If the density of screw dislocation pits and diagonal line defects is reduced to ≤2 pairs/cm², then device reliability improves, but the manufacturing precision requirements increase
Solution Approach 1:
The patent achieves high defect density control by optimizing specific parameters: the off-angle θ is controlled within 0° < θ ≤ 6° and the epitaxial layer thickness t is precisely managed. These parameter specifications enable consistent production with defect densities ≤2 pairs/cm² while maintaining feasible manufacturing precision
Solution Approach 2:
The patent replaces mechanical/physical trial-and-error defect reduction with a theoretically grounded approach based on the relationship between off-angle θ, thickness t, and defect formation. The defect distance formula d = t/tanθ provides a predictive model that guides precise manufacturing without requiring extensive experimental iteration
3Productivity
If the substrate diameter is increased to ≥150 mm, then production efficiency improves, but the control of defect density becomes more difficult
Solution Approach 1:
The patent maintains defect density control on large diameter substrates (≥150 mm) by applying the same optimized parameters across the entire substrate surface: off-angle θ (0° < θ ≤ 6°) and controlled epitaxial thickness t. This consistent parameter application ensures uniform defect density ≤2 pairs/cm² across the large substrate area, enabling both high productivity and high precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reduced density of screw dislocation pits and diagonal line defects in the silicon carbide epitaxial wafer minimizes the risk of reliability issues in semiconductor devices, allowing for the production of more reliable devices by controlling the density of these defects to less than or equal to 2 pairs/cm².
Implementation Method 1
a silicon carbide epitaxial layer of a thickness t formed on the major surface
Data Source
AI summary
A silicon carbide epitaxial wafer includes a single crystal silicon carbide substrate of 4H polytype having a major surface thereof inclined at an angle θ to a {0001} plane toward a <11-20> direction, and a silicon carbide epitaxial layer of a thickness t formed on the major surface, wherein a diameter of the single crystal silicon carbide substrate is greater than or equal to 150 mm, wherein the angle θ exceeds 0°, and is less than or equal to 6°, wherein one or more pairs of a screw dislocation pit and a diagonal line defect situated at a distance of t/tanθ from the pit are present in a surface of the silicon carbide epitaxial layer, and wherein a density of the pairs of a pit and a diagonal line defect is less than or equal to 2 pairs/cm2.