SiC Wafer Side-Surface Modified Lines to Limit Cracks

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Solution Overview

Problem

The formation of multiple modified lines on the entire surface of SiC semiconductor wafers can lead to fluctuations in electrical characteristics and the generation of cracks, making it undesirable.

Innovation Solution

An SiC semiconductor device with a single modified line on each side surface, extending in a band shape along the tangential direction, is formed to reduce the influence on the SiC semiconductor layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple modified lines are formed over the entire areas of the side surfaces of the SiC semiconductor layer, then the manufacturing efficiency is improved and cutting is enabled without physical cutting members, but electrical characteristics fluctuate and cracks may generate

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidelectrical characteristics stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by forming modified lines only at specific locations (side surfaces) rather than uniformly across the entire SiC semiconductor layer. This localized modification approach enables the stealth dicing function while minimizing the total modified area, thereby reducing electrical characteristic fluctuations and crack generation risks.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the modification process by forming discrete modified lines at specific side surface locations rather than creating a continuous modified layer across the entire device. This segmentation reduces the overall modified area and isolates the modification effects to minimal necessary regions, preserving electrical stability.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple modified lines are formed over the entire areas of the side surfaces, then the SiC semiconductor layer can be cut efficiently using the stealth dicing method, but the complexity of the device structure increases

Engineering Contradiction:
Improvecutting efficiencyVSAvoidstructure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent reduces structural complexity by applying modification locally only at side surfaces where it is functionally necessary for stealth dicing, rather than uniformly across the entire device structure. This localized approach minimizes the number of modified regions and simplifies the overall device architecture.

Inventive Principle:
Principle #3Local quality

3Loss of time

If modified lines are formed to enable stealth dicing, then physical cutting members are eliminated and manufacturing time is shortened, but cracks may generate starting from the modified lines

Engineering Contradiction:
Improvemanufacturing timeVSAvoidcrack resistance
Core Design Contradiction:
Loss of timeVSStrength

Solution Approach 1:

The patent minimizes crack risk by concentrating modified lines only at side surface locations essential for stealth dicing, rather than distributing modifications across the entire SiC layer. This reduces the total modified area and potential crack initiation sites, preserving structural strength.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent extracts the modification function to only the minimum necessary locations (side surfaces) required for stealth dicing, removing unnecessary modifications from other areas. This extraction reduces the overall modified area and associated crack risks while maintaining the essential cutting functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes the adverse effects on the SiC semiconductor layer, such as electrical fluctuations and crack generation, while allowing for efficient manufacturing without the need for physical cutting tools.

Implementation Method 1

after laser light is selectively irradiated onto the SiC semiconductor wafer, the SiC semiconductor wafer is cut along the portion irradiated with the laser light

Methodology Applied
Scientific EffectLaser heating: Laser

Data Source

PatentUS20240282825A1SiC SEMICONDUCTOR DEVICE
Publication Date: 2024.08.22 ROHM CO LTD
  • US20240282825A1 patent drawing
  • US20240282825A1 patent drawing
  • US20240282825A1 patent drawing

AI summary

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.